📄 tcm0201.fit.rpt
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; change:inst4|series_parallel:inst1|lpm_counter:n_rtl_3|dffs[2] ; 26 ;
; change:inst4|series_parallel:inst1|lpm_counter:n_rtl_3|dffs[3] ; 25 ;
; NRZIN ; 24 ;
; change:inst4|series_parallel:inst1|lpm_counter:n_rtl_3|dffs[4] ; 24 ;
; DEVIDE:inst5|74393:176|3 ; 18 ;
; CODEandIE:inst2|74161:inst18|p74161:sub|9 ; 16 ;
; CODEandIE:inst2|inst1 ; 15 ;
; CODEandIE:inst2|74161:inst18|p74161:sub|8 ; 15 ;
; DEVIDE:inst5|520 ; 15 ;
; CODEandIE:inst2|inst8 ; 14 ;
; addr[0] ; 13 ;
; addr[1] ; 13 ;
; addr[2] ; 13 ;
; change:inst4|parallel_series:inst|n[0] ; 12 ;
; para_out12:inst20|reduce_or~2 ; 12 ;
; change:inst4|parallel_series:inst|n[1] ; 11 ;
; change:inst4|parallel_series:inst|n[3] ; 6 ;
; change:inst4|parallel_series:inst|n[2] ; 6 ;
; 3IN12:inst7|fenpin_36:inst1|temp[1] ; 6 ;
; 3IN12:inst7|fenpin_36:inst1|temp[0] ; 6 ;
; 3IN12:inst7|fenpin_36:inst1|temp[3] ; 5 ;
; change:inst4|parallel_series:inst5|n[3] ; 5 ;
; change:inst4|parallel_series:inst5|n[2] ; 5 ;
; 3IN12:inst7|fenpin_36:inst1|temp[2] ; 5 ;
; DEVIDE:inst5|74393:176|9 ; 5 ;
; DEVIDE:inst5|74393:176|1 ; 5 ;
; DEVIDE:inst5|74393:175|30 ; 5 ;
; 3IN12:inst7|fenpin_36:inst1|temp[4] ; 4 ;
; DEVIDE:inst5|74393:176|28 ; 4 ;
; series_para_store:inst22|rega[11] ; 3 ;
; series_para_store:inst22|rega[0] ; 3 ;
; series_para_store:inst22|rega[1] ; 3 ;
; series_para_store:inst22|rega[2] ; 3 ;
; series_para_store:inst22|rega[3] ; 3 ;
; series_para_store:inst22|rega[4] ; 3 ;
; series_para_store:inst22|rega[5] ; 3 ;
; series_para_store:inst22|rega[6] ; 3 ;
; series_para_store:inst22|rega[7] ; 3 ;
+----------------------------------------------------------------+---------+
+-------------------------------------------------+
; Interconnect Usage Summary ;
+----------------------------+--------------------+
; Interconnect Resource Type ; Usage ;
+----------------------------+--------------------+
; Output enables ; 2 / 6 ( 33 % ) ;
; PIA buffers ; 328 / 576 ( 56 % ) ;
; PIAs ; 349 / 576 ( 60 % ) ;
+----------------------------+--------------------+
+------------------------------------------------------------------------------+
; LAB External Interconnect ;
+-----------------------------------------------+------------------------------+
; LAB External Interconnects (Average = 21.81) ; Number of LABs (Total = 16) ;
+-----------------------------------------------+------------------------------+
; 0 - 2 ; 0 ;
; 3 - 5 ; 0 ;
; 6 - 8 ; 0 ;
; 9 - 11 ; 0 ;
; 12 - 14 ; 0 ;
; 15 - 17 ; 2 ;
; 18 - 20 ; 5 ;
; 21 - 23 ; 5 ;
; 24 - 26 ; 0 ;
; 27 - 29 ; 2 ;
; 30 - 32 ; 2 ;
+-----------------------------------------------+------------------------------+
+------------------------------------------------------------------------+
; LAB Macrocells ;
+-----------------------------------------+------------------------------+
; Number of Macrocells (Average = 15.06) ; Number of LABs (Total = 16) ;
+-----------------------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 1 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 0 ;
; 12 ; 0 ;
; 13 ; 0 ;
; 14 ; 3 ;
; 15 ; 1 ;
; 16 ; 11 ;
+-----------------------------------------+------------------------------+
+---------------------------------------------------------+
; Parallel Expander ;
+--------------------------+------------------------------+
; Parallel Expander Length ; Number of Parallel Expanders ;
+--------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 13 ;
+--------------------------+------------------------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; A ; LC2 ; 3IN12:inst7|fenpin_36:inst1|temp[1], 3IN12:inst7|fenpin_36:inst1|temp[0], DEVIDE:inst5|74393:176|3 ; 3IN12:inst7|fenpin_36:inst1|temp[1], 3IN12:inst7|fenpin_36:inst1|temp[2], 3IN12:inst7|fenpin_36:inst1|temp[3], 3IN12:inst7|fenpin_36:inst1|temp[4], 3IN12:inst7|fenpin_36:inst1|temp[5], 3IN12:inst7|fenpin_36:inst1|fsout ;
; A ; LC13 ; change:inst4|series_parallel:inst1|rega[16], FS_IN ; change:inst4|parallel_series:inst|digit[8]~148 ⌨️ 快捷键说明
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