ads7844.hif

本源码介绍了ADS7844 AD转换芯片的VHDL控制器。

Version 7.1 Build 156 04/30/2007 SJ Full Version
36
2051
OFF
OFF
OFF
OFF
ON
ON
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
ads7844
# storage
db|ads7844.(0).cnf
db|ads7844.(0).cnf
# case_insensitive
# source_file
ads7844.bdf
144f64236f5d878fa367478e854b9c4
25
# hierarchies {
|
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
fq_cs
# storage
db|ads7844.(1).cnf
db|ads7844.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
fq_cs.vhd
845b2f6268b8ecfd754e2d7ecd4820f4
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
fq_cs:inst3
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
dff_2
# storage
db|ads7844.(2).cnf
db|ads7844.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
dff_2.vhd
38851ca56c856136a01de08ba393b7
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
fq_cs:inst3|dff_2:u1
fq_cs:inst3|dff_2:u2
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
fq
# storage
db|ads7844.(3).cnf
db|ads7844.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
fq.vhd
213b44e175e93c78289786924bca22e1
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
fq:inst
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
to_ad
# storage
db|ads7844.(4).cnf
db|ads7844.(4).cnf
# case_insensitive
# source_file
to_ad.bdf
8748687e8f037aaea93f7a80fe6ad7
25
# hierarchies {
to_ad:inst4
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
74165b
# storage
db|ads7844.(5).cnf
db|ads7844.(5).cnf
# case_insensitive
# source_file
c:|altera|71|quartus|libraries|others|maxplus2|74165b.bdf
8230d7784819fb397ff9244243a8338
25
# hierarchies {
to_ad:inst4|74165b:inst
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cs_pulse
# storage
db|ads7844.(6).cnf
db|ads7844.(6).cnf
# case_insensitive
# source_file
cs_pulse.bdf
df1327b73e19895219583fa2ad88e99
25
# hierarchies {
cs_pulse:inst5
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cs_wide
# storage
db|ads7844.(7).cnf
db|ads7844.(7).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
cs_wide.vhd
fa1df1743efa5d489cda824fbeb2796
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
cs_pulse:inst5|cs_wide:inst
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
addr_1
# storage
db|ads7844.(8).cnf
db|ads7844.(8).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
addr_1.vhd
f6774344123d5a51bfbc357d99daa7e
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
addr_1:inst1
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
d_latch
# storage
db|ads7844.(9).cnf
db|ads7844.(9).cnf
# case_insensitive
# source_file
d_latch.bdf
631e31eee5f1a83ceff4572deca4139
25
# hierarchies {
d_latch:inst6
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_shiftreg0
# storage
db|ads7844.(10).cnf
db|ads7844.(10).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
lpm_shiftreg0.vhd
5da610142cceaa2e97b1f5f3792b5ba
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
d_latch:inst6|lpm_shiftreg0:inst55
d_latch:inst6|lpm_shiftreg0:inst22
d_latch:inst6|lpm_shiftreg0:inst35
d_latch:inst6|lpm_shiftreg0:inst39
d_latch:inst6|lpm_shiftreg0:inst43
d_latch:inst6|lpm_shiftreg0:inst47
d_latch:inst6|lpm_shiftreg0:inst51
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_shiftreg
# storage
db|ads7844.(11).cnf
db|ads7844.(11).cnf
# case_insensitive
# source_file
c:|altera|71|quartus|libraries|megafunctions|lpm_shiftreg.tdf
3afc744803f77b6fa5676c390d0fb8f
6
# user_parameter {
LPM_WIDTH
16
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
LEFT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
enable
-1
3
clock
-1
3
aclr
-1
3
}
# include_file {
c:|altera|71|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
c:|altera|71|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
c:|altera|71|quartus|libraries|megafunctions|aglobal71.inc
80b63f71158cd1a01acf29ef94ccd6
}
# hierarchies {
d_latch:inst6|lpm_shiftreg0:inst55|lpm_shiftreg:lpm_shiftreg_component
d_latch:inst6|lpm_shiftreg2:inst1|lpm_shiftreg:lpm_shiftreg_component
d_latch:inst6|lpm_shiftreg0:inst22|lpm_shiftreg:lpm_shiftreg_component
d_latch:inst6|lpm_shiftreg0:inst35|lpm_shiftreg:lpm_shiftreg_component
d_latch:inst6|lpm_shiftreg0:inst39|lpm_shiftreg:lpm_shiftreg_component
d_latch:inst6|lpm_shiftreg0:inst43|lpm_shiftreg:lpm_shiftreg_component
d_latch:inst6|lpm_shiftreg0:inst47|lpm_shiftreg:lpm_shiftreg_component
d_latch:inst6|lpm_shiftreg0:inst51|lpm_shiftreg:lpm_shiftreg_component
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_shiftreg2
# storage
db|ads7844.(12).cnf
db|ads7844.(12).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
lpm_shiftreg2.vhd
62b8c393385a164aed721044137dac9
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
d_latch:inst6|lpm_shiftreg2:inst1
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
74465
# storage
db|ads7844.(13).cnf
db|ads7844.(13).cnf
# case_insensitive
# source_file
c:|altera|71|quartus|libraries|others|maxplus2|74465.bdf
77f58cc64946efcbd6d960b3a11ebc46
25
# hierarchies {
d_latch:inst6|74465:inst14
d_latch:inst6|74465:inst15
d_latch:inst6|74465:inst58
d_latch:inst6|74465:inst60
d_latch:inst6|74465:inst62
d_latch:inst6|74465:inst64
d_latch:inst6|74465:inst66
d_latch:inst6|74465:inst68
d_latch:inst6|74465:inst13
d_latch:inst6|74465:inst16
d_latch:inst6|74465:inst59
d_latch:inst6|74465:inst61
d_latch:inst6|74465:inst63
d_latch:inst6|74465:inst65
d_latch:inst6|74465:inst67
d_latch:inst6|74465:inst69
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
74138
# storage
db|ads7844.(14).cnf
db|ads7844.(14).cnf
# case_insensitive
# source_file
c:|altera|71|quartus|libraries|others|maxplus2|74138.bdf
6cadbea2e3f85766eb8e4e262292077
25
# hierarchies {
d_latch:inst6|74138:inst70
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram0
# storage
db|ads7844.(15).cnf
db|ads7844.(15).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
altsyncram0.vhd
63e26f2d487d8e8ecac3828a766185
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
d_latch:inst6|altsyncram0:inst33
d_latch:inst6|altsyncram0:inst34
d_latch:inst6|altsyncram0:inst31