led.map.rpt

以两种结构编写的VHDL驱动LED 已通过调试

; Total fan-out        ; 305                  ;
; Average fan-out      ; 7.82                 ;
+----------------------+----------------------+


+----------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                  ;
+----------------------------+------------+------+---------------------+
; Compilation Hierarchy Node ; Macrocells ; Pins ; Full Hierarchy Name ;
+----------------------------+------------+------+---------------------+
; |led                       ; 29         ; 10   ; |led                ;
;    |ledx:u1|               ; 21         ; 0    ; |led|ledx:u1        ;
;    |ledy:u2|               ; 8          ; 0    ; |led|ledy:u2        ;
+----------------------------+------------+------+---------------------+


+---------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: ledx:u1|lpm_add_sub:Add0 ;
+------------------------+-------------+------------------------------------+
; Parameter Name         ; Value       ; Type                               ;
+------------------------+-------------+------------------------------------+
; LPM_WIDTH              ; 20          ; Untyped                            ;
; LPM_REPRESENTATION     ; UNSIGNED    ; Untyped                            ;
; LPM_DIRECTION          ; ADD         ; Untyped                            ;
; ONE_INPUT_IS_CONSTANT  ; YES         ; Untyped                            ;
; LPM_PIPELINE           ; 0           ; Untyped                            ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                            ;
; REGISTERED_AT_END      ; 0           ; Untyped                            ;
; OPTIMIZE_FOR_SPEED     ; 9           ; Untyped                            ;
; USE_CS_BUFFERS         ; 1           ; Untyped                            ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                            ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH                 ;
; DEVICE_FAMILY          ; MAX3000A    ; Untyped                            ;
; USE_WYS                ; OFF         ; Untyped                            ;
; STYLE                  ; FAST        ; Untyped                            ;
; CBXI_PARAMETER         ; add_sub_foh ; Untyped                            ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                         ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                       ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                       ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                     ;
+------------------------+-------------+------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Thu Jan 17 13:57:21 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off led -c led
Info: Found 2 design units, including 1 entities, in source file led.vhd
    Info: Found design unit 1: led-structure
    Info: Found entity 1: led
Info: Found 2 design units, including 1 entities, in source file ledx.vhd
    Info: Found design unit 1: ledx-behave
    Info: Found entity 1: ledx
Info: Found 2 design units, including 1 entities, in source file ledy.vhd
    Info: Found design unit 1: ledy-behave
    Info: Found entity 1: ledy
Info: Elaborating entity "led" for the top level hierarchy
Info: Elaborating entity "ledx" for hierarchy "ledx:u1"
Info: Elaborating entity "ledy" for hierarchy "ledy:u2"
Info: Found 1 design units, including 1 entities, in source file ../quartusii/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborated megafunction instantiation "ledx:u1|lpm_add_sub:Add0"
Info: Found 1 design units, including 1 entities, in source file ../quartusii/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Elaborated megafunction instantiation "ledx:u1|lpm_add_sub:Add0|addcore:adder[2]", which is child of megafunction instantiation "ledx:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ledx:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "20"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file ../quartusii/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Elaborated megafunction instantiation "ledx:u1|lpm_add_sub:Add0|addcore:adder[2]|a_csnbuffer:oflow_node", which is child of megafunction instantiation "ledx:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ledx:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "20"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "ledx:u1|lpm_add_sub:Add0|addcore:adder[2]|a_csnbuffer:result_node", which is child of megafunction instantiation "ledx:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ledx:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "20"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "ledx:u1|lpm_add_sub:Add0|addcore:adder[1]", which is child of megafunction instantiation "ledx:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ledx:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "20"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file ../quartusii/libraries/megafunctions/look_add.tdf
    Info: Found entity 1: look_add
Info: Elaborated megafunction instantiation "ledx:u1|lpm_add_sub:Add0|look_add:look_ahead_unit", which is child of megafunction instantiation "ledx:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ledx:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "20"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file ../quartusii/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Elaborated megafunction instantiation "ledx:u1|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "ledx:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ledx:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "20"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "ledx:u1|lpm_add_sub:Add0|altshift:carry_ext_latency_ffs", which is child of megafunction instantiation "ledx:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ledx:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "20"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Promoted pin-driven signal(s) to global signal
    Info: Promoted clock signal driven by pin "clkq" to global clock signal
Info: Implemented 39 device resources after synthesis - the final resource count might be different
    Info: Implemented 2 input pins
    Info: Implemented 8 output pins
    Info: Implemented 29 macrocells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
    Info: Processing ended: Thu Jan 17 13:57:25 2008
    Info: Elapsed time: 00:00:05