top_level.xst

xilinx reference design for 1553B BUS analyer using

set -tmpdir .
set -dumpdir .
set -overwrite YES
run
-ent top_level
-ifn top_level.prj
-ifmt VHDL
-opt_mode Area
-opt_level 1
-fsm_extract YES -fsm_encoding Compact
-fsm_fftype D
-hdlverbose 1
-ram_extract Yes
-ram_style Auto
-mux_extract YES
-mux_style Auto
-decoder_extract YES
-priority_extract YES
-shreg_extract YES
-shift_extract YES
-xor_collapse YES
-resource_sharing YES
-complex_clken YES
-resolutionStyle WIRE_MS
-ofn top_level.edn
-ofmt EDIF
-family 9500
-iobuf NO
-fastobuf NO
-macrogen Macro+
-pld_mp YES
-pld_xp YES
-pld_ffopt YES
-merge YES
-pld_ce YES