top_level.blx

xilinx reference design for 1553B BUS analyer using

.names sp_a[9] sp_cs0n N851 dvm_I_sm_address_8.Q N_PZ_4077 a[8]-
0---1 1
-110- 1
.names sp_a[10] sp_cs0n N851 dvm_I_sm_address_9.Q N_PZ_4077 a[9]-
0---1 1
-110- 1
.names sp_cs0n N851 dvm_I_man_data_0.Q sp_d[0].PIN N_PZ_4077 d[0]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_10.Q sp_d[10].PIN N_PZ_4077 d[10]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_11.Q sp_d[11].PIN N_PZ_4077 d[11]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_12.Q sp_d[12].PIN N_PZ_4077 d[12]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_13.Q sp_d[13].PIN N_PZ_4077 d[13]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_14.Q sp_d[14].PIN N_PZ_4077 d[14]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_15.Q sp_d[15].PIN N_PZ_4077 d[15]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_1.Q sp_d[1].PIN N_PZ_4077 d[1]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_2.Q sp_d[2].PIN N_PZ_4077 d[2]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_3.Q sp_d[3].PIN N_PZ_4077 d[3]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_4.Q sp_d[4].PIN N_PZ_4077 d[4]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_5.Q sp_d[5].PIN N_PZ_4077 d[5]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_6.Q sp_d[6].PIN N_PZ_4077 d[6]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_7.Q sp_d[7].PIN N_PZ_4077 d[7]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_8.Q sp_d[8].PIN N_PZ_4077 d[8]-
---01 1
110-- 1
.names sp_cs0n N851 dvm_I_man_data_9.Q sp_d[9].PIN N_PZ_4077 d[9]-
---01 1
110-- 1
.names sp_cs0n flash_cs0n
1 1
.names flash_wr_protect
1
.names io42
.names io44
.names io6
.names io7
.names io8
.names io9
.names led1_sel
.names led2_sel
.names led3_sel
.names sp_cs0n sp_oen N851 dvm_I_statemachine_oe.Q N_PZ_4077 oen-
-0--1 1
1-10- 1
.names reset_memn
1
.names sp_wen N_PZ_4077 rwn
11 1
.names sp_a_0
.names d[0].PIN sp_d[0]
1 1
.names d[10].PIN sp_d[10]
1 1
.names d[11].PIN sp_d[11]
1 1
.names d[12].PIN sp_d[12]
1 1
.names d[13].PIN sp_d[13]
1 1
.names d[14].PIN sp_d[14]
1 1
.names d[15].PIN sp_d[15]
1 1
.names d[1].PIN sp_d[1]
1 1
.names d[2].PIN sp_d[2]
1 1
.names d[3].PIN sp_d[3]
1 1
.names d[4].PIN sp_d[4]
1 1
.names d[5].PIN sp_d[5]
1 1
.names d[6].PIN sp_d[6]
1 1
.names d[7].PIN sp_d[7]
1 1
.names d[8].PIN sp_d[8]
1 1
.names d[9].PIN sp_d[9]
1 1
.names sp_cs1n N_PZ_4077 sram_cs1n
11 1
.names sram_low_byten
.names sram_upper_byten
.names test_out
.names dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q N2267
1011 1
0001 1
.names N2278 dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q dvm_mdi1.Q 
       dvm_mdi3.Q dvm_command_status_0.Q dvm_command_status_1.Q 
       dvm_rclock_count_0.Q dvm_rclock_count_1.Q dvm_rclock_count_2.Q 
       dvm_rclock_count_3.Q dvm_rclock_count_4.Q dvm_rclock_count_5.Q 
       dvm_rclock_count_6.Q dvm_rclock_count_7.Q N_PZ_4100 N2364
0----------------- 1
-100-------------- 1
-0-11------------- 1
-1-01------------- 1
-00-0------------- 1
---0---01--------1 1
--1-1----1111----0 1
-11000---11111011- 1
-1100-1--11111011- 1
.names sp_a[10] sp_a[11] sp_a[12] sp_a[13] sp_a[14] sp_a[16] sp_a[17] sp_a[19] 
       sp_a[1] sp_a[20] sp_a[21] sp_a[22] sp_a[23] sp_a[4] sp_a[6] sp_a[7] 
       N805-
1111111010000111 1
.names dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q dvm_data1.Q 
       dvm_data2.Q dvm_clock_count_0.Q dvm_clock_count_1.Q dvm_clock_count_2.Q 
       dvm_clock_count_3.Q dvm_clock_count_4.Q dvm_clock_count_5.Q N2273
11111-000101 1
1111-1000101 1
.names dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q dvm_mdi1.Q 
       dvm_mdi3.Q N2278-
111010 1
.names dvm_main_curr_state_FFD2.Q dvm_clock_count_0.Q dvm_clock_count_1.Q 
       dvm_clock_count_2.Q dvm_clock_count_3.Q dvm_clock_count_4.Q 
       dvm_clock_count_5.Q N2406-
1000101 1
.names dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q N1106-
0000 1
.names N2267 dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q N851
1---- 1
-1000 1
.names reset_button led0_sel.Q dvm_main_curr_state_FFD1.AR-
10 1
.names clk16 dvm_main_curr_state_FFD1.CLK
1 1
.names reset_button led0_sel.Q dvm_main_curr_state_FFD2.AR-
10 1
.names clk16 dvm_main_curr_state_FFD2.CLK
1 1
.names N2364 dvm_main_curr_state_FFD2.D-
1 1
.names reset_button led0_sel.Q dvm_main_curr_state_FFD3.AR-
10 1
.names clk16 dvm_main_curr_state_FFD3.CLK
1 1
.names N2273 N1106 dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q dvm_mdi1.Q 
       dvm_mdi3.Q dvm_pwclock_count_0.Q dvm_pwclock_count_1.Q 
       dvm_pwclock_count_2.Q dvm_pwclock_count_3.Q dvm_pwclock_count_4.Q 
       N_PZ_4074 N_PZ_4100 N_PZ_4264 dvm_main_curr_state_FFD3.D-
1--------------- 1
--0--1---------- 1
--00----------0- 1
-1--0--------1-1 1
--1-000------1-- 1
--1-00-1-----1-- 1
--0-----11101-0- 1
.names reset_button led0_sel.Q dvm_main_curr_state_FFD4.AR-
10 1
.names clk16 dvm_main_curr_state_FFD4.CLK
1 1
.names N2406 dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q dvm_mdi1.Q 
       dvm_mdi3.Q dvm_rclock_count_0.Q dvm_rclock_count_1.Q 
       dvm_rclock_count_2.Q dvm_rclock_count_3.Q dvm_rclock_count_4.Q 
       dvm_rclock_count_5.Q dvm_rclock_count_6.Q dvm_rclock_count_7.Q 
       dvm_main_curr_state_FFD4.D
11-11---------- 1
-0101---------- 1
-11-010-------- 1
-010---11110111 1
.names dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q 
       dvm_clock_count_0.Q dvm_clock_count_1.Q dvm_clock_count_2.Q 
       dvm_clock_count_3.Q dvm_clock_count_4.Q dvm_clock_count_5.Q 
       dvm_data1.CE
1111110110 1
.names clk16 dvm_data1.CLK
1 1
.names dvm_mdi1.Q dvm_data1.D
1 1
.names dvm_main_curr_state_FFD1.Q dvm_main_curr_state_FFD2.Q 
       dvm_main_curr_state_FFD3.Q dvm_main_curr_state_FFD4.Q 
       dvm_clock_count_0.Q dvm_clock_count_1.Q dvm_clock_count_2.Q 
       dvm_clock_count_3.Q dvm_clock_count_4.Q dvm_clock_count_5.Q 
       dvm_data2.CE
1111110001 1
.names clk16 dvm_data2.CLK
1 1
.names dvm_mdi1.Q dvm_data2.D
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_0.AR
11 1
.names clk16 dvm_I_sm_address_0.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_1.AR
11 1
.names clk16 dvm_I_sm_address_1.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_10.AR
11 1
.names clk16 dvm_I_sm_address_10.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_11.AR
11 1
.names clk16 dvm_I_sm_address_11.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_12.AR
11 1
.names clk16 dvm_I_sm_address_12.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_13.AR
11 1
.names clk16 dvm_I_sm_address_13.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_14.AR
11 1
.names clk16 dvm_I_sm_address_14.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_15.AR
11 1
.names clk16 dvm_I_sm_address_15.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_16.AR
11 1
.names clk16 dvm_I_sm_address_16.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_17.AR
11 1
.names clk16 dvm_I_sm_address_17.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_18.AR
11 1
.names clk16 dvm_I_sm_address_18.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_19.AR
11 1
.names clk16 dvm_I_sm_address_19.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_2.AR
11 1
.names clk16 dvm_I_sm_address_2.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_20.AR
11 1
.names clk16 dvm_I_sm_address_20.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_21.AR
11 1
.names clk16 dvm_I_sm_address_21.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_22.AR
11 1
.names clk16 dvm_I_sm_address_22.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_3.AR
11 1
.names clk16 dvm_I_sm_address_3.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_4.AR
11 1
.names clk16 dvm_I_sm_address_4.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_5.AR
11 1
.names clk16 dvm_I_sm_address_5.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_6.AR
11 1
.names clk16 dvm_I_sm_address_6.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_7.AR
11 1
.names clk16 dvm_I_sm_address_7.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_8.AR
11 1
.names clk16 dvm_I_sm_address_8.CLK
1 1
.names reset_button led0_sel.Q dvm_I_sm_address_9.AR
11 1
.names clk16 dvm_I_sm_address_9.CLK
1 1
.names reset_button led0_sel.Q dvm_mdi1.CE
10 1
.names clk16 dvm_mdi1.CLK
1 1
.names din_pri dvm_mdi1.D
1 1
.names reset_button led0_sel.Q dvm_mdi3.CE
10 1
.names clk16 dvm_mdi3.CLK
1 1
.names dvm_mdi2.Q dvm_mdi3.D
1 1
.names reset_button led0_sel.Q dvm_time_counter_0.CE
10 1