top_level.ph2

xilinx reference design for 1553B BUS analyer using

     & dvm_main_curr_state_FFD4.Q & dvm_clock_count_0.Q & !dvm_clock_count_1.Q
    
      # !N2267 & dvm_clock_count_1.Q & !N_PZ_4100 & N_PZ_4264
      # dvm_main_curr_state_FFD4.Q & !dvm_clock_count_0.Q & 
    dvm_clock_count_1.Q
      # !dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & 
    dvm_clock_count_1.Q;		"--- [PT=4, FI=8, LVL=3] ---
! dvm_clock_count_2.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_clock_count_2.D = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD3.Q
     & dvm_main_curr_state_FFD4.Q & dvm_clock_count_0.Q & dvm_clock_count_1.Q
     & !dvm_clock_count_2.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD3.Q & 
    dvm_main_curr_state_FFD4.Q & !dvm_clock_count_1.Q & dvm_clock_count_2.Q
    
      # !N2267 & dvm_clock_count_2.Q & !N_PZ_4100 & N_PZ_4264
      # dvm_main_curr_state_FFD4.Q & !dvm_clock_count_0.Q & 
    dvm_clock_count_2.Q
      # !dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & 
    dvm_clock_count_2.Q;		"--- [PT=5, FI=9, LVL=3] ---
! dvm_clock_count_3.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
! dvm_clock_count_3.T = !N2267 & dvm_clock_count_3.Q & !N_PZ_4100 & N_PZ_4264
    
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD4.Q & !
    dvm_clock_count_2.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD4.Q & !
    dvm_clock_count_1.Q
      # !dvm_main_curr_state_FFD4.Q & !dvm_clock_count_3.Q
      # !dvm_main_curr_state_FFD1.Q & !dvm_clock_count_3.Q
      # dvm_main_curr_state_FFD4.Q & !dvm_clock_count_0.Q
      # !dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q
    ;		"--- [PT=7, FI=10, LVL=3] ---
! dvm_clock_count_4.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
! dvm_clock_count_4.T = !N2267 & dvm_clock_count_4.Q & !N_PZ_4100 & N_PZ_4264
    
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD4.Q & !
    dvm_clock_count_3.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD4.Q & !
    dvm_clock_count_2.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD4.Q & !
    dvm_clock_count_1.Q
      # !dvm_main_curr_state_FFD4.Q & !dvm_clock_count_4.Q
      # !dvm_main_curr_state_FFD1.Q & !dvm_clock_count_4.Q
      # dvm_main_curr_state_FFD4.Q & !dvm_clock_count_0.Q
      # !dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q
    ;		"--- [PT=8, FI=11, LVL=3] ---
! dvm_clock_count_5.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_clock_count_5.D = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD3.Q
     & dvm_main_curr_state_FFD4.Q & dvm_clock_count_0.Q & dvm_clock_count_1.Q
     & dvm_clock_count_2.Q & dvm_clock_count_3.Q & dvm_clock_count_4.Q & !
    dvm_clock_count_5.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD3.Q & 
    dvm_main_curr_state_FFD4.Q & !dvm_clock_count_4.Q & dvm_clock_count_5.Q
    
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD3.Q & 
    dvm_main_curr_state_FFD4.Q & !dvm_clock_count_3.Q & dvm_clock_count_5.Q
    
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD3.Q & 
    dvm_main_curr_state_FFD4.Q & !dvm_clock_count_2.Q & dvm_clock_count_5.Q
    
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD3.Q & 
    dvm_main_curr_state_FFD4.Q & !dvm_clock_count_1.Q & dvm_clock_count_5.Q
    
      # !N2267 & dvm_clock_count_5.Q & !N_PZ_4100 & N_PZ_4264
      # dvm_main_curr_state_FFD4.Q & !dvm_clock_count_0.Q & 
    dvm_clock_count_5.Q
      # !dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & 
    dvm_clock_count_5.Q;		"--- [PT=8, FI=12, LVL=3] ---
 dvm_command_status_0.D = dvm_main_curr_state_FFD1.Q & 
    dvm_main_curr_state_FFD2.Q & dvm_main_curr_state_FFD3.Q & 
    dvm_main_curr_state_FFD4.Q & dvm_data2.Q & !dvm_command_status_0.Q & !
    dvm_clock_count_0.Q & !dvm_clock_count_1.Q & !dvm_clock_count_2.Q & 
    dvm_clock_count_3.Q & !dvm_clock_count_4.Q & dvm_clock_count_5.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & dvm_data1.Q & !
    dvm_command_status_0.Q & !dvm_clock_count_0.Q & !dvm_clock_count_1.Q & !
    dvm_clock_count_2.Q & dvm_clock_count_3.Q & !dvm_clock_count_4.Q & 
    dvm_clock_count_5.Q;		"--- [PT=2, FI=13, LVL=1] ---
! dvm_command_status_0.LE = !N2273 & N2278;		"--- [PT=1, FI=2, LVL=2] ---
 dvm_command_status_1.D = dvm_main_curr_state_FFD1.Q & 
    dvm_main_curr_state_FFD2.Q & dvm_main_curr_state_FFD3.Q & 
    dvm_main_curr_state_FFD4.Q & dvm_data2.Q & dvm_command_status_0.Q & !
    dvm_command_status_1.Q & !dvm_clock_count_0.Q & !dvm_clock_count_1.Q & !
    dvm_clock_count_2.Q & dvm_clock_count_3.Q & !dvm_clock_count_4.Q & 
    dvm_clock_count_5.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & dvm_data1.Q & 
    dvm_command_status_0.Q & !dvm_command_status_1.Q & !dvm_clock_count_0.Q & !
    dvm_clock_count_1.Q & !dvm_clock_count_2.Q & dvm_clock_count_3.Q & !
    dvm_clock_count_4.Q & dvm_clock_count_5.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & dvm_data2.Q & !
    dvm_command_status_0.Q & dvm_command_status_1.Q & !dvm_clock_count_0.Q & !
    dvm_clock_count_1.Q & !dvm_clock_count_2.Q & dvm_clock_count_3.Q & !
    dvm_clock_count_4.Q & dvm_clock_count_5.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & dvm_data1.Q & !
    dvm_command_status_0.Q & dvm_command_status_1.Q & !dvm_clock_count_0.Q & !
    dvm_clock_count_1.Q & !dvm_clock_count_2.Q & dvm_clock_count_3.Q & !
    dvm_clock_count_4.Q & dvm_clock_count_5.Q;		"--- [PT=4, FI=14, LVL=1] ---
! dvm_command_status_1.LE = !N2273 & N2278;		"--- [PT=1, FI=2, LVL=2] ---
 dvm_data1.CE = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & 
    dvm_clock_count_0.Q & dvm_clock_count_1.Q & !dvm_clock_count_2.Q & 
    dvm_clock_count_3.Q & dvm_clock_count_4.Q & !dvm_clock_count_5.Q
    ;		"--- [PT=1, FI=10, LVL=1] ---
 dvm_data1.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_data1.D = dvm_mdi1.Q;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_data2.CE = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & 
    dvm_clock_count_0.Q & dvm_clock_count_1.Q & !dvm_clock_count_2.Q & !
    dvm_clock_count_3.Q & !dvm_clock_count_4.Q & dvm_clock_count_5.Q
    ;		"--- [PT=1, FI=10, LVL=1] ---
 dvm_data2.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_data2.D = dvm_mdi1.Q;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_data3.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_data3.T = !dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & !dvm_main_curr_state_FFD4.Q & dvm_mdi1.Q & !
    dvm_data3.Q & dvm_pwclock_count_0.Q & dvm_pwclock_count_1.Q & !
    dvm_pwclock_count_2.Q & dvm_pwclock_count_3.Q & !dvm_pwclock_count_4.Q
    
      # !dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & !dvm_main_curr_state_FFD4.Q & !dvm_mdi1.Q & 
    dvm_data3.Q & dvm_pwclock_count_0.Q & dvm_pwclock_count_1.Q & !
    dvm_pwclock_count_2.Q & dvm_pwclock_count_3.Q & !dvm_pwclock_count_4.Q
    
      # !dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & !
    dvm_main_curr_state_FFD3.Q & dvm_mdi1.Q & !dvm_data3.Q & 
    dvm_rclock_count_0.Q & dvm_rclock_count_1.Q & !dvm_rclock_count_2.Q & !
    dvm_rclock_count_3.Q
      # !dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & !
    dvm_main_curr_state_FFD3.Q & !dvm_mdi1.Q & dvm_data3.Q & 
    dvm_rclock_count_0.Q & dvm_rclock_count_1.Q & !dvm_rclock_count_2.Q & !
    dvm_rclock_count_3.Q;		"--- [PT=4, FI=15, LVL=1] ---
! dvm_main_curr_state_FFD1.AR = reset_button & !led0_sel.Q
    ;		"--- [PT=1, FI=2, LVL=1] ---
 dvm_main_curr_state_FFD1.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_main_curr_state_FFD1.T = dvm_main_curr_state_FFD1.Q & !
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q
      # !N2406 & dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD4.Q
    
      # !dvm_main_curr_state_FFD1.Q & !dvm_main_curr_state_FFD2.Q & !
    dvm_main_curr_state_FFD3.Q;		"--- [PT=3, FI=5, LVL=2] ---
! dvm_main_curr_state_FFD2.AR = reset_button & !led0_sel.Q
    ;		"--- [PT=1, FI=2, LVL=1] ---
 dvm_main_curr_state_FFD2.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
! dvm_main_curr_state_FFD2.D = N2364;		"--- [PT=1, FI=1, LVL=3] ---
! dvm_main_curr_state_FFD3.AR = reset_button & !led0_sel.Q
    ;		"--- [PT=1, FI=2, LVL=1] ---
 dvm_main_curr_state_FFD3.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
! dvm_main_curr_state_FFD3.D = !dvm_main_curr_state_FFD1.Q & 
    dvm_pwclock_count_0.Q & dvm_pwclock_count_1.Q & dvm_pwclock_count_2.Q & !
    dvm_pwclock_count_3.Q & dvm_pwclock_count_4.Q & !N_PZ_4100
      # dvm_main_curr_state_FFD1.Q & !dvm_main_curr_state_FFD3.Q & !
    dvm_main_curr_state_FFD4.Q & dvm_mdi3.Q & N_PZ_4074
      # dvm_main_curr_state_FFD1.Q & !dvm_main_curr_state_FFD3.Q & !
    dvm_main_curr_state_FFD4.Q & !dvm_mdi1.Q & N_PZ_4074
      # N1106 & !dvm_main_curr_state_FFD3.Q & N_PZ_4074 & N_PZ_4264
      # !dvm_main_curr_state_FFD1.Q & !dvm_main_curr_state_FFD2.Q & !N_PZ_4100
    
      # !dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD4.Q
      # N2273;		"--- [PT=7, FI=16, LVL=3] ---
! dvm_main_curr_state_FFD4.AR = reset_button & !led0_sel.Q
    ;		"--- [PT=1, FI=2, LVL=1] ---
 dvm_main_curr_state_FFD4.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_main_curr_state_FFD4.D = !dvm_main_curr_state_FFD1.Q & 
    dvm_main_curr_state_FFD2.Q & !dvm_main_curr_state_FFD3.Q & 
    dvm_rclock_count_0.Q & dvm_rclock_count_1.Q & dvm_rclock_count_2.Q & 
    dvm_rclock_count_3.Q & !dvm_rclock_count_4.Q & dvm_rclock_count_5.Q & 
    dvm_rclock_count_6.Q & dvm_rclock_count_7.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & !
    dvm_main_curr_state_FFD4.Q & dvm_mdi1.Q & !dvm_mdi3.Q
      # !dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & !
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q
      # N2406 & dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD3.Q & 
    dvm_main_curr_state_FFD4.Q;		"--- [PT=4, FI=15, LVL=2] ---
 dvm_man_word_0.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_man_word_0.T = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & !dvm_data1.Q & 
    dvm_data2.Q & !dvm_clock_count_0.Q & !dvm_clock_count_1.Q & !
    dvm_clock_count_2.Q & dvm_clock_count_3.Q & !dvm_clock_count_4.Q & 
    dvm_clock_count_5.Q & dvm_man_word_0.Q
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & 
    dvm_main_curr_state_FFD3.Q & dvm_main_curr_state_FFD4.Q & dvm_data1.Q & !
    dvm_clock_count_0.Q & !dvm_clock_count_1.Q & !dvm_clock_count_2.Q & 
    dvm_clock_count_3.Q & !dvm_clock_count_4.Q & dvm_clock_count_5.Q & !
    dvm_man_word_0.Q
      # !dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & !
    dvm_main_curr_state_FFD4.Q & dvm_data3.Q & !dvm_man_word_0.Q & N_PZ_4072
    
      # !dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & !
    dvm_main_curr_state_FFD4.Q & !dvm_data3.Q & dvm_man_word_0.Q & N_PZ_4072
    
      # dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & !
    dvm_main_curr_state_FFD3.Q & !dvm_main_curr_state_FFD4.Q & 
    dvm_man_word_0.Q;		"--- [PT=5, FI=15, LVL=2] ---
 dvm_man_word_1.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_man_word_1.T = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q & !
    dvm_main_curr_state_FFD3.Q & !dvm_main_curr_state_FFD4.Q & 
    dvm_man_word_1.Q
      # dvm_man_word_0.Q & !dvm_man_word_1.Q & N_PZ_4199
      # !dvm_man_word_0.Q & dvm_man_word_1.Q & N_PZ_4199
    ;		"--- [PT=3, FI=7, LVL=3] ---
 dvm_man_word_10.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_man_word_10.T = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q
     & !dvm_main_curr_state_FFD3.Q & !dvm_main_curr_state_FFD4.Q & 
    dvm_man_word_10.Q
      # dvm_man_word_10.Q & !dvm_man_word_9.Q & N_PZ_4199
      # !dvm_man_word_10.Q & dvm_man_word_9.Q & N_PZ_4199
    ;		"--- [PT=3, FI=7, LVL=3] ---
 dvm_man_word_11.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_man_word_11.T = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q
     & !dvm_main_curr_state_FFD3.Q & !dvm_main_curr_state_FFD4.Q & 
    dvm_man_word_11.Q
      # dvm_man_word_10.Q & !dvm_man_word_11.Q & N_PZ_4199
      # !dvm_man_word_10.Q & dvm_man_word_11.Q & N_PZ_4199
    ;		"--- [PT=3, FI=7, LVL=3] ---
 dvm_man_word_12.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_man_word_12.T = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q
     & !dvm_main_curr_state_FFD3.Q & !dvm_main_curr_state_FFD4.Q & 
    dvm_man_word_12.Q
      # dvm_man_word_11.Q & !dvm_man_word_12.Q & N_PZ_4199
      # !dvm_man_word_11.Q & dvm_man_word_12.Q & N_PZ_4199
    ;		"--- [PT=3, FI=7, LVL=3] ---
 dvm_man_word_13.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_man_word_13.T = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q
     & !dvm_main_curr_state_FFD3.Q & !dvm_main_curr_state_FFD4.Q & 
    dvm_man_word_13.Q
      # dvm_man_word_12.Q & !dvm_man_word_13.Q & N_PZ_4199
      # !dvm_man_word_12.Q & dvm_man_word_13.Q & N_PZ_4199
    ;		"--- [PT=3, FI=7, LVL=3] ---
 dvm_man_word_14.CLK = clk16;		"--- [PT=1, FI=1, LVL=1] ---
 dvm_man_word_14.T = dvm_main_curr_state_FFD1.Q & dvm_main_curr_state_FFD2.Q
     & !dvm_main_curr_state_FFD3.Q & !dvm_main_curr