top_level.er2

xilinx reference design for 1553B BUS analyer using

Parsing...
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Parsing file top_level.bl3 ...

Parsing file xplalib.xst ...
> WARNING 5615 Pin/Node 'CLK16' is not found in module  but 'clk16' is found.
	   Enable case insensitive matching.
..

Synthesizing and Optimizing...
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> WARNING 2358  Dangling pin din_sec removed.
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%% Network final ======> 213 Mcells, 8 FbNand, 484 PLApts, 4 Levels


%% ERROR count: 0  WARNING count: 2