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📄 updncnt.fit.smsg

📁 universal count un iversal count
💻 SMSG
字号:
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 6.1 Build 201 11/27/2006 SJ Full Version
    Info: Processing started: Mon Jan 21 20:43:57 2008
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off UpDnCnt -c UpDnCnt
Info: Selected device EP2C35F672C6 for design "UpDnCnt"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Fitter is using the Classic Timing Analyzer
Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time.
Info: The Fitter has identified 1 logical partitions of which 0 have a previous placement to use
    Info: Previous placement does not exist for 33 of 33 atoms in partition Top
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
    Info: Device EP2C50F672C6 is compatible
    Info: Device EP2C70F672C6 is compatible
Info: Fitter converted 3 user pins into dedicated programming pins
    Info: Pin ~ASDO~ is reserved at location E3
    Info: Pin ~nCSO~ is reserved at location D3
    Info: Pin ~LVDS150p/nCEO~ is reserved at location AE24
Warning: No exact pin location assignment(s) for 14 pins of 14 total pins
    Info: Pin q[0] not assigned to an exact location on the device
    Info: Pin q[1] not assigned to an exact location on the device
    Info: Pin q[2] not assigned to an exact location on the device
    Info: Pin q[3] not assigned to an exact location on the device
    Info: Pin en not assigned to an exact location on the device
    Info: Pin d[0] not assigned to an exact location on the device
    Info: Pin ld not assigned to an exact location on the device
    Info: Pin up not assigned to an exact location on the device
    Info: Pin dn not assigned to an exact location on the device
    Info: Pin clr not assigned to an exact location on the device
    Info: Pin clk not assigned to an exact location on the device
    Info: Pin d[1] not assigned to an exact location on the device
    Info: Pin d[2] not assigned to an exact location on the device
    Info: Pin d[3] not assigned to an exact location on the device
Info: Automatically promoted node clk (placed in PIN P2 (CLK2, LVDSCLK1p, Input))
    Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G3
Info: Starting register packing
Info: Finished register packing: elapsed time is 00:00:00
    Extra Info: No registers were packed into other blocks
Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement
    Info: Number of I/O pins in group: 13 (unused VREF, 3.30 VCCIO, 9 input, 0 output, 4 bidirectional)
        Info: I/O standards used: 3.3-V LVTTL.
Info: I/O bank details before I/O pin placement
    Info: Statistics of I/O banks
        Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 1 total pin(s) used --  63 pins available
        Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 2 total pin(s) used --  57 pins available
        Info: I/O bank number 3 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  56 pins available
        Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  58 pins available
        Info: I/O bank number 5 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  65 pins available
        Info: I/O bank number 6 does not use VREF pins and has unused VCCIO pins. 1 total pin(s) used --  58 pins available
        Info: I/O bank number 7 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  58 pins available
        Info: I/O bank number 8 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  56 pins available
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Fitter routing operations beginning
Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%
    Info: The peak interconnect region extends from location X0_Y24 to location X10_Y36
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time.
    Info: Optimizations that may affect the design's routability were skipped
    Info: Optimizations that may affect the design's timing were skipped
Info: Started post-fitting delay annotation
Warning: Found 4 output pins without output pin load capacitance assignment
    Info: Pin "q[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "q[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "q[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "q[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info: Delay annotation completed successfully
Info: Following groups of pins have the same output enable
    Info: Following pins have the same output enable: en
        Info: Type bidirectional pin q[0] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin q[1] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin q[2] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin q[3] uses the 3.3-V LVTTL I/O standard
Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'.
Info: Quartus II Fitter was successful. 0 errors, 3 warnings
    Info: Allocated 232 megabytes of memory during processing
    Info: Processing ended: Mon Jan 21 20:44:29 2008
    Info: Elapsed time: 00:00:32

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