uart.pcf

用Verilog实现的串口异步通信

//! **************************************************************************
// Written by: Map H.42 on Sat Jan 12 16:39:05 2008
//! **************************************************************************

SCHEMATIC START;
COMP "CLK" LOCATE = SITE "AC17" LEVEL 1;
COMP "data_out" LOCATE = SITE "AF7" LEVEL 1;
COMP "data_in" LOCATE = SITE "AF6" LEVEL 1;
PIN
        i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/0/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1043/RAMB16_pins<158>
        = BEL
        "i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/0/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1043/RAMB16"
        PINNAME CLKB;
PIN
        i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/1/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1039/RAMB16_pins<158>
        = BEL
        "i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/1/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1039/RAMB16"
        PINNAME CLKB;
PIN
        i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/2/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1035/RAMB16_pins<158>
        = BEL
        "i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/2/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1035/RAMB16"
        PINNAME CLKB;
PIN
        i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/3/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1031/RAMB16_pins<158>
        = BEL
        "i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/3/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1031/RAMB16"
        PINNAME CLKB;
PIN
        i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/4/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1027/RAMB16_pins<158>
        = BEL
        "i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/4/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1027/RAMB16"
        PINNAME CLKB;
PIN
        i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/5/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1023/RAMB16_pins<158>
        = BEL
        "i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/5/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1023/RAMB16"
        PINNAME CLKB;
PIN
        i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/6/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1019/RAMB16_pins<158>
        = BEL
        "i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/6/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1019/RAMB16"
        PINNAME CLKB;
PIN
        i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/7/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1015/RAMB16_pins<158>
        = BEL
        "i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/7/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1015/RAMB16"
        PINNAME CLKB;
PIN
        i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/8/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1011/RAMB16_pins<158>
        = BEL
        "i_ila/ila/i_yes_d/u_ila/i_intcap/u_capstor/i_case1/i_rt1/u_ram/g_bram/8/u_bram/ram_rt1_s1_s4_if/ram_rt1_s1_s4_i/newSim1011/RAMB16"
        PINNAME CLKB;
TIMEGRP D_CLK = BEL "rxdata_8" BEL "rxdata_9" BEL "rxdata_0" BEL "flag" BEL
        "data1_7" BEL "cnt2_24" BEL "cnt1_26" BEL "busy" BEL "hunt1" BEL
        "i_ila/ila/i_tq0/g_tw/0/u_tq" BEL "i_ila/ila/i_dq/g_dw/0/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/1/u_dq" BEL "i_ila/ila/i_dq/g_dw/2/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/3/u_dq" BEL "i_ila/ila/i_dq/g_dw/4/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/5/u_dq" BEL "i_ila/ila/i_dq/g_dw/6/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/7/u_dq" BEL "i_ila/ila/i_dq/g_dw/8/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/9/u_dq" BEL "i_ila/ila/i_dq/g_dw/10/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/11/u_dq" BEL "i_ila/ila/i_dq/g_dw/12/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/13/u_dq" BEL "i_ila/ila/i_dq/g_dw/14/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/15/u_dq" BEL "i_ila/ila/i_dq/g_dw/16/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/17/u_dq" BEL "i_ila/ila/i_dq/g_dw/18/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/19/u_dq" BEL "i_ila/ila/i_dq/g_dw/20/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/21/u_dq" BEL "i_ila/ila/i_dq/g_dw/22/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/23/u_dq" BEL "i_ila/ila/i_dq/g_dw/24/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/25/u_dq" BEL "i_ila/ila/i_dq/g_dw/26/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/27/u_dq" BEL "i_ila/ila/i_dq/g_dw/28/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/29/u_dq" BEL "i_ila/ila/i_dq/g_dw/30/u_dq" BEL
        "i_ila/ila/i_dq/g_dw/31/u_dq" BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/0/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/0/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/1/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/1/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/2/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/2/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/3/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/3/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/4/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/4/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/5/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/5/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/6/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/6/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/7/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/7/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/8/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/8/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/9/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/9/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/10/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/10/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/11/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/11/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/12/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/12/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/13/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/13/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/14/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/14/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/15/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/15/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/16/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/16/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/17/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/17/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/18/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/18/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/19/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/19/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/20/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/20/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/21/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/21/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/22/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/22/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/23/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/23/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/24/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/24/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/25/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/25/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/26/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/26/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/27/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/27/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/28/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/28/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/29/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/29/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/30/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/30/i_srlt_ne_0/ff"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/31/i_srlt_ne_0/dly9/SRL16E"
        BEL
        "i_ila/ila/i_yes_d/u_ila/i_dq/u_dqq/dly_9/dly_9_gen/31/i_srlt_ne_0/ff"
        BEL "i_ila/ila/i_yes_d/u_ila/u_rst/u_por" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_halt_xfer/u_dout0" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_halt_xfer/u_dout1" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_halt_xfer/u_dout" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_halt_xfer/u_rfdre" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_halt_xfer/u_gen_delay/1/u_fd" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_halt_xfer/u_gen_delay/2/u_fd" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_arm_xfer/u_dout0" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_arm_xfer/u_dout1" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_arm_xfer/u_dout" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_arm_xfer/u_rfdre" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_arm_xfer/u_gen_delay/1/u_fd" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_arm_xfer/u_gen_delay/2/u_fd" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_arm_xfer/u_gen_delay/3/u_fd" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/u_arm_xfer/u_gen_delay/4/u_fd" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/g_rst/0/u_rst" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/g_rst/1/u_rst" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/g_rst/2/u_rst" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/g_rst/3/u_rst" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/g_rst/4/u_rst" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/g_rst/5/u_rst" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/g_rst/6/u_rst" BEL
        "i_ila/ila/i_yes_d/u_ila/u_rst/g_rst/7/u_rst" BEL
        "i_ila/ila/i_yes_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/u_mu/i_mut_gand/u_match/pd_rpm/i_twmod8_ne0/i_yes_rpm/i_oreg/u_oreg"
        BEL
        "i_ila/ila/i_yes_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/u_mu/i_mut_gand/u_match/i_yes_ireg/f_tw/0/u_ireg"
        BEL
        "i_ila/ila/i_yes_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/u_mu/i_oreg/i_yes_oreg/u_oreg"
        BEL
        "i_ila/ila/i_yes_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/i_mc_no/u_no_mc_reg"