design rule check - hw.drc

此程序主要是通过红外检测物体是否落下

Protel Design System Design Rule Check
PCB File : D:\电路\formfeed2051\HW.PcbDoc
Date     : 2006-4-11
Time     : 11:42:23

Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=12mil) (All),(All)
Rule Violations :0

Processing Rule : Width Constraint (Min=6mil) (Max=100mil) (Preferred=45mil) (All)
Rule Violations :0

Processing Rule : Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=1mil) (Max=100mil) (All)
   Violation between Pad Free-0(8410mil,10345mil)  Multi-Layer
   Violation between Pad Free-0(10870mil,6850mil)  Multi-Layer
   Violation between Pad Free-0(10870mil,9240mil)  Multi-Layer
Rule Violations :3


Violations Detected : 3
Time Elapsed        : 00:00:00