📄 dds.srr
字号:
addr_acc[6] dds|clk DFFB Q addr_acc[6] 0.260 990.883
addr_acc[8] dds|clk DFFB Q addr_acc[8] 0.260 992.570
addr_acc[7] dds|clk DFFB Q addr_acc[7] 0.260 993.240
addr_acc[9] dds|clk DFFB Q addr_acc[9] 0.260 993.746
========================================================================================
Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
Clock
------------------------------------------------------------------------------------------------
addr_acc[9] dds|clk DFFB D ADD_10x10_slow_I9_Y 999.556 979.989
addr_acc[8] dds|clk DFFB D ADD_10x10_slow_I8_S 999.556 981.492
addr_acc[7] dds|clk DFFB D ADD_10x10_slow_I7_S 999.556 983.430
addr_acc[6] dds|clk DFFB D ADD_10x10_slow_I6_S 999.556 985.788
addr_acc[5] dds|clk DFFB D ADD_10x10_slow_I5_S 999.556 988.146
addr_acc[4] dds|clk DFFB D ADD_10x10_slow_I4_S 999.556 990.392
addr_acc[3] dds|clk DFFB D ADD_10x10_slow_I3_S 999.556 992.218
addr_acc[2] dds|clk DFFB D ADD_10x10_slow_I2_S 999.556 994.044
addr_acc[1] dds|clk DFFB D ADD_10x10_slow_I1_S 999.556 995.836
addr_acc[0] dds|clk DFFB D ADD_10x10_slow_I0_S_0_x3 999.556 997.038
================================================================================================
Worst Path Information
***********************
Path information for path number 1:
Requested Period: 1000.000
- Setup time: 0.444
= Required time: 999.556
- Propagation time: 19.567
= Slack (critical) : 979.989
Number of logic level(s): 18
Starting point: addr_acc[0] / Q
Ending point: addr_acc[9] / D
The start point is clocked by dds|clk [rising] on pin CLK
The end point is clocked by dds|clk [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
----------------------------------------------------------------------------------------------------------------
addr_acc[0] DFFB Q Out 0.260 0.260 -
addr_acc[0] Net - - 1.480 - 3
un1_addr_acc.ADD_10x10_slow_I1_CO1_0_a2 AND2 A In - 1.740 -
un1_addr_acc.ADD_10x10_slow_I1_CO1_0_a2 AND2 Y Out 0.108 1.848 -
un1_addr_acc.N_51 Net - - 1.060 - 2
un1_addr_acc.ADD_10x10_slow_I1_CO1_0_a3 OAI21 C In - 2.908 -
un1_addr_acc.ADD_10x10_slow_I1_CO1_0_a3 OAI21 Y Out 0.068 2.976 -
un1_addr_acc.N_41 Net - - 0.630 - 1
un1_addr_acc.ADD_10x10_slow_I1_CO1_0_o3 AO21TTF C In - 3.606 -
un1_addr_acc.ADD_10x10_slow_I1_CO1_0_o3 AO21TTF Y Out 0.068 3.674 -
un1_addr_acc.N142 Net - - 1.060 - 2
un1_addr_acc.ADD_10x10_slow_I2_un1_CO1_0_a3_0 OAI21 C In - 4.734 -
un1_addr_acc.ADD_10x10_slow_I2_un1_CO1_0_a3_0 OAI21 Y Out 0.068 4.802 -
un1_addr_acc.N_47 Net - - 0.630 - 1
un1_addr_acc.ADD_10x10_slow_I2_un1_CO1_0_o3 AO21TTF C In - 5.432 -
un1_addr_acc.ADD_10x10_slow_I2_un1_CO1_0_o3 AO21TTF Y Out 0.068 5.500 -
ADD_10x10_slow_I2_un1_CO1_0_o3 Net - - 1.060 - 2
un1_addr_acc.ADD_10x10_slow_I3_CO1_0_a3_0 OAI21 C In - 6.560 -
un1_addr_acc.ADD_10x10_slow_I3_CO1_0_a3_0 OAI21 Y Out 0.068 6.628 -
ADD_10x10_slow_I3_CO1_0_a3_0 Net - - 0.630 - 1
un1_addr_acc.ADD_10x10_slow_I3_CO1_0_o3 AO21TTF C In - 7.258 -
un1_addr_acc.ADD_10x10_slow_I3_CO1_0_o3 AO21TTF Y Out 0.068 7.326 -
un1_addr_acc.N146 Net - - 1.060 - 2
un1_addr_acc.ADD_10x10_slow_I4_un1_CO1_i_a3 OAI21 C In - 8.386 -
un1_addr_acc.ADD_10x10_slow_I4_un1_CO1_i_a3 OAI21 Y Out 0.068 8.454 -
ADD_10x10_slow_I4_un1_CO1_i_a3 Net - - 0.630 - 1
un1_addr_acc.ADD_10x10_slow_I4_un1_CO1_i_o3 AO21TTF C In - 9.084 -
un1_addr_acc.ADD_10x10_slow_I4_un1_CO1_i_o3 AO21TTF Y Out 0.068 9.152 -
un1_addr_acc.N_17_i Net - - 1.480 - 3
un1_addr_acc.ADD_10x10_slow_I5_CO1_i_o3_0 OAI21 B In - 10.632 -
un1_addr_acc.ADD_10x10_slow_I5_CO1_i_o3_0 OAI21 Y Out 0.180 10.812 -
un1_addr_acc.ADD_10x10_slow_I5_CO1_i_o3_0 Net - - 0.630 - 1
un1_addr_acc.ADD_10x10_slow_I5_CO1_i_o3 AO21TTF C In - 11.442 -
un1_addr_acc.ADD_10x10_slow_I5_CO1_i_o3 AO21TTF Y Out 0.068 11.510 -
un1_addr_acc.N150 Net - - 1.480 - 3
un1_addr_acc.ADD_10x10_slow_I6_un1_CO1_i_o3_0 OAI21 B In - 12.990 -
un1_addr_acc.ADD_10x10_slow_I6_un1_CO1_i_o3_0 OAI21 Y Out 0.180 13.170 -
un1_addr_acc.ADD_10x10_slow_I6_un1_CO1_i_o3_0 Net - - 0.630 - 1
un1_addr_acc.ADD_10x10_slow_I6_un1_CO1_i_o3 AO21TTF C In - 13.800 -
un1_addr_acc.ADD_10x10_slow_I6_un1_CO1_i_o3 AO21TTF Y Out 0.068 13.868 -
ADD_10x10_slow_I6_un1_CO1_i_o3 Net - - 1.480 - 3
un1_addr_acc.ADD_10x10_slow_I7_CO1_i_o3_0 OAI21 B In - 15.348 -
un1_addr_acc.ADD_10x10_slow_I7_CO1_i_o3_0 OAI21 Y Out 0.180 15.528 -
un1_addr_acc.ADD_10x10_slow_I7_CO1_i_o3_0 Net - - 0.630 - 1
un1_addr_acc.ADD_10x10_slow_I7_CO1_i_o3 AO21TTF C In - 16.158 -
un1_addr_acc.ADD_10x10_slow_I7_CO1_i_o3 AO21TTF Y Out 0.068 16.226 -
un1_addr_acc.N154 Net - - 1.060 - 2
un1_addr_acc.ADD_10x10_slow_I8_un1_CO1_i_a3 AOI21 C In - 17.286 -
un1_addr_acc.ADD_10x10_slow_I8_un1_CO1_i_a3 AOI21 Y Out 0.104 17.390 -
un1_addr_acc.N_31_i Net - - 0.630 - 1
un1_addr_acc.ADD_10x10_slow_I8_un1_CO1_i OAI21TTF C In - 18.020 -
un1_addr_acc.ADD_10x10_slow_I8_un1_CO1_i OAI21TTF Y Out 0.104 18.123 -
un1_addr_acc.I8_un1_CO1_i Net - - 0.630 - 1
un1_addr_acc.ADD_10x10_slow_I9_Y XOR2FT A In - 18.753 -
un1_addr_acc.ADD_10x10_slow_I9_Y XOR2FT Y Out 0.184 18.937 -
ADD_10x10_slow_I9_Y Net - - 0.630 - 1
addr_acc[9] DFFB D In - 19.567 -
================================================================================================================
Total path delay (propagation time + setup) of 20.011 is 2.491(12.4%) logic and 17.520(87.6%) route.
##### END OF TIMING REPORT #####]
--------------------------------------------------------------------------------
Report for cell dds.verilog
Cell usage:
cell count area count*area
IB33 29 0.0 0.0
OB33PH 18 0.0 0.0
XOR2FT 18 1.0 18.0
XOR2 18 1.0 18.0
NOR2FT 10 1.0 10.0
NOR2 10 1.0 10.0
DFFB 10 4.0 40.0
AO21TTF 7 1.0 7.0
OAI21 7 1.0 7.0
BFR 1 1.0 1.0
OAI21TTF 1 1.0 1.0
GL33 1 0.0 0.0
AND2 1 1.0 1.0
AOI21 1 1.0 1.0
PWR 1 0.0 0.0
GND 1 0.0 0.0
----- ----------
TOTAL 134 114.0
Mapper successful!
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Wed Oct 31 14:45:39 2007
###########################################################]
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -