dds.areasrr

FPGA中实现基于查找表方式（LUT）的DDS实现

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Report for cell dds.verilog
                                          Cell usage:
                               cell       count     area    count*area
                               IB33        29       0.0        0.0
                             OB33PH        18       0.0        0.0
                             XOR2FT        18       1.0       18.0
                               XOR2        18       1.0       18.0
                             NOR2FT        10       1.0       10.0
                               NOR2        10       1.0       10.0
                               DFFB        10       4.0       40.0
                            AO21TTF         7       1.0        7.0
                              OAI21         7       1.0        7.0
                                BFR         1       1.0        1.0
                           OAI21TTF         1       1.0        1.0
                               GL33         1       0.0        0.0
                               AND2         1       1.0        1.0
                              AOI21         1       1.0        1.0
                                PWR         1       0.0        0.0
                                GND         1       0.0        0.0
                            
                         TOTAL            134                114.0