📄 dds_toc.htm

📁 FPGA中实现基于查找表方式（LUT）的DDS实现

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<font size=3><a><b>rev_1 (dds)</a></b><br><br></font>
<b><dt><a href="dds_srr.htm#compilerReport14" target="srrFrame">Compiler Report</a></dt></b><br>
<b><dt><a href="dds_srr.htm#timingReport15" target="srrFrame">Timing Report</a></dt></b><br>
<dt><a href="dds_srr.htm#performanceSummary16" target="srrFrame">Performance Summary</a></dt><br>
<dt><a href="dds_srr.htm#clockRelationships17" target="srrFrame">Clock Relationships</a></dt><br>
<dt><a href="dds_srr.htm#interfaceInfo18" target="srrFrame">Interface Information</a></dt><br>
<dt><a href="dds_srr.htm#clockReport19" target="srrFrame">Detailed Report for Clock: dds|clk</a></dt><br>
<dd><a href="dds_srr.htm#startingSlack20" target="srrFrame">Starting Points with Worst Slack</a></dd><br>
<dd><a href="dds_srr.htm#endingSlack21" target="srrFrame">Ending Points with Worst Slack</a></dd><br>
<dd><a href="dds_srr.htm#worstPaths22" target="srrFrame">Worst Path Information</a></dd><br>

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