_info

FPGA中实现基于查找表方式（LUT）的DDS实现

m255
K3
13
cModel Technology
dD:\Work\DPLL_20071029_rdy
vaccumulator
I0^fLHB:2Sdid83o7:z0;O3
VB;n=JBOFV2I3:H:9?9@NF3
dD:\Work\dds_20071031
w1193807897
8D:/Work/dds_20071031/accumulator.v
FD:/Work/dds_20071031/accumulator.v
L0 1
Z0 OE;L;6.3a;37
r1
31
Z1 o-work work -nocovercells -L mtiAvm
!s85 0
vdds
VR=PcmjbQSo1aFKQJB?RR31
r1
31
IYFVc5?C4^iFb6FSodVPId0
Z2 dE:\Work\dds_20071031
w1193848507
8E:/Work/dds_20071031/dds.v
FE:/Work/dds_20071031/dds.v
L0 1
Z3 OE;L;6.3a;37
R1
!s85 0
vdds_tb
V4EiVYVFe0MTbQd_NoP1<L1
r1
31
ImcQD:l_W^MkeYkNU9k:hC1
R2
w1193835444
8E:/Work/dds_20071031/dds_tb.v
FE:/Work/dds_20071031/dds_tb.v
L0 1
R3
R1
!s85 0
vrom
VXF514ZF9JYJge?SQdO1e51
r1
31
Idl3;m>W10?Qjf9TlG`NOi1
R2
Z4 w1193845723
Z5 8E:/Work/dds_20071031/rom_syn.v
Z6 FE:/Work/dds_20071031/rom_syn.v
L0 518
R3
R1
!s85 0
vrom_altsyncram
VLcTC:DT5<j8V1]:gz37;X1
r1
!s85 0
31
IZN=McPmGalZ>K@lH0MIUF0
R2
R4
R5
R6
L0 46
R3
R1