📄 alarm_set.rpt
字号:
- 3 - A 16 AND2 0 4 0 2 |LPM_ADD_SUB:203|addcore:adder|:75
- 2 - B 15 OR2 ! 0 2 0 3 |LPM_ADD_SUB:370|addcore:adder|:67
- 7 - B 15 AND2 0 4 0 2 |LPM_ADD_SUB:370|addcore:adder|:75
- 2 - C 18 OR2 ! 0 3 0 3 |LPM_ADD_SUB:528|addcore:adder|:67
- 3 - A 17 DFFE + 1 2 1 2 sec_tmp5 (:25)
- 4 - A 17 DFFE + 1 2 1 3 sec_tmp4 (:26)
- 6 - A 16 DFFE + 1 2 1 3 sec_tmp3 (:27)
- 5 - A 16 DFFE + 1 2 1 4 sec_tmp2 (:28)
- 1 - A 17 DFFE + 1 2 1 3 sec_tmp1 (:29)
- 8 - A 17 DFFE + 1 1 1 3 sec_tmp0 (:30)
- 6 - B 21 DFFE + 1 2 1 2 min_tmp5 (:31)
- 5 - B 21 DFFE + 1 2 1 3 min_tmp4 (:32)
- 3 - B 15 DFFE + 1 2 1 3 min_tmp3 (:33)
- 1 - B 15 DFFE + 1 2 1 4 min_tmp2 (:34)
- 7 - B 21 DFFE + 1 2 1 3 min_tmp1 (:35)
- 1 - B 21 DFFE + 1 1 1 3 min_tmp0 (:36)
- 3 - C 21 DFFE + 0 2 1 3 hour_tmp4 (:37)
- 1 - C 18 DFFE + 1 2 1 3 hour_tmp3 (:38)
- 5 - C 18 DFFE + 1 2 1 2 hour_tmp2 (:39)
- 3 - C 18 DFFE + 1 2 1 3 hour_tmp1 (:40)
- 6 - A 17 DFFE + 1 1 1 3 hour_tmp0 (:41)
- 2 - B 21 AND2 2 0 0 17 :138
- 2 - A 16 OR2 s 0 3 0 1 ~159~1
- 8 - A 16 OR2 s 1 3 0 5 ~280~1
- 7 - A 17 OR2 0 4 0 1 :280
- 5 - A 17 OR2 0 3 0 1 :286
- 7 - A 16 OR2 0 4 0 1 :292
- 4 - A 16 OR2 0 3 0 1 :298
- 2 - A 17 OR2 0 3 0 1 :304
- 5 - B 15 OR2 s 0 3 0 1 ~326~1
- 4 - B 15 OR2 s 1 3 0 5 ~447~1
- 8 - B 21 OR2 0 4 0 1 :447
- 4 - B 21 OR2 0 3 0 1 :453
- 8 - B 15 OR2 0 4 0 1 :459
- 6 - B 15 OR2 0 3 0 1 :465
- 3 - B 21 OR2 0 3 0 1 :471
- 1 - C 21 OR2 1 3 0 1 :594
- 4 - C 18 OR2 s 1 3 0 2 ~595~1
- 8 - C 18 OR2 1 3 0 1 :601
- 7 - C 18 OR2 0 4 0 1 :607
- 6 - C 18 OR2 0 3 0 1 :613
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: d:\my work\fpga\13_1908\vhdlcoder\alarm_set.rpt
alarm_set
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 2/ 96( 2%) 0/ 48( 0%) 8/ 48( 16%) 0/16( 0%) 5/16( 31%) 0/16( 0%)
B: 4/ 96( 4%) 0/ 48( 0%) 8/ 48( 16%) 1/16( 6%) 6/16( 37%) 0/16( 0%)
C: 1/ 96( 1%) 0/ 48( 0%) 6/ 48( 12%) 0/16( 0%) 4/16( 25%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
18: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: d:\my work\fpga\13_1908\vhdlcoder\alarm_set.rpt
alarm_set
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 17 hz1
Device-Specific Information: d:\my work\fpga\13_1908\vhdlcoder\alarm_set.rpt
alarm_set
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 17 rst
Device-Specific Information: d:\my work\fpga\13_1908\vhdlcoder\alarm_set.rpt
alarm_set
** EQUATIONS **
alarm : INPUT;
hour_tune : INPUT;
hz1 : INPUT;
min_tune : INPUT;
ok : INPUT;
rst : INPUT;
sec_tune : INPUT;
-- Node name is ':41' = 'hour_tmp0'
-- Equation name is 'hour_tmp0', location is LC6_A17, type is buried.
hour_tmp0 = DFFE( _EQ001, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ001 = hour_tmp0 & !_LC2_B21
# hour_tmp0 & !hour_tune
# !hour_tmp0 & hour_tune & _LC2_B21;
-- Node name is ':40' = 'hour_tmp1'
-- Equation name is 'hour_tmp1', location is LC3_C18, type is buried.
hour_tmp1 = DFFE( _EQ002, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ002 = _LC2_B21 & _LC6_C18
# hour_tmp1 & !hour_tune
# hour_tmp1 & !_LC2_B21;
-- Node name is ':39' = 'hour_tmp2'
-- Equation name is 'hour_tmp2', location is LC5_C18, type is buried.
hour_tmp2 = DFFE( _EQ003, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ003 = _LC2_B21 & _LC7_C18
# hour_tmp2 & !hour_tune
# hour_tmp2 & !_LC2_B21;
-- Node name is ':38' = 'hour_tmp3'
-- Equation name is 'hour_tmp3', location is LC1_C18, type is buried.
hour_tmp3 = DFFE( _EQ004, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ004 = _LC2_B21 & _LC8_C18
# hour_tmp3 & !hour_tune
# hour_tmp3 & !_LC2_B21;
-- Node name is ':37' = 'hour_tmp4'
-- Equation name is 'hour_tmp4', location is LC3_C21, type is buried.
hour_tmp4 = DFFE( _EQ005, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ005 = _LC1_C21 & _LC2_B21
# hour_tmp4 & !_LC2_B21;
-- Node name is 'hour0'
-- Equation name is 'hour0', type is output
hour0 = hour_tmp0;
-- Node name is 'hour1'
-- Equation name is 'hour1', type is output
hour1 = hour_tmp1;
-- Node name is 'hour2'
-- Equation name is 'hour2', type is output
hour2 = hour_tmp2;
-- Node name is 'hour3'
-- Equation name is 'hour3', type is output
hour3 = hour_tmp3;
-- Node name is 'hour4'
-- Equation name is 'hour4', type is output
hour4 = hour_tmp4;
-- Node name is ':36' = 'min_tmp0'
-- Equation name is 'min_tmp0', location is LC1_B21, type is buried.
min_tmp0 = DFFE( _EQ006, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ006 = !_LC2_B21 & min_tmp0
# min_tmp0 & !min_tune
# _LC2_B21 & !min_tmp0 & min_tune;
-- Node name is ':35' = 'min_tmp1'
-- Equation name is 'min_tmp1', location is LC7_B21, type is buried.
min_tmp1 = DFFE( _EQ007, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ007 = _LC2_B21 & _LC3_B21
# min_tmp1 & !min_tune
# !_LC2_B21 & min_tmp1;
-- Node name is ':34' = 'min_tmp2'
-- Equation name is 'min_tmp2', location is LC1_B15, type is buried.
min_tmp2 = DFFE( _EQ008, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ008 = _LC2_B21 & _LC6_B15
# min_tmp2 & !min_tune
# !_LC2_B21 & min_tmp2;
-- Node name is ':33' = 'min_tmp3'
-- Equation name is 'min_tmp3', location is LC3_B15, type is buried.
min_tmp3 = DFFE( _EQ009, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ009 = _LC2_B21 & _LC8_B15
# min_tmp3 & !min_tune
# !_LC2_B21 & min_tmp3;
-- Node name is ':32' = 'min_tmp4'
-- Equation name is 'min_tmp4', location is LC5_B21, type is buried.
min_tmp4 = DFFE( _EQ010, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ010 = _LC2_B21 & _LC4_B21
# min_tmp4 & !min_tune
# !_LC2_B21 & min_tmp4;
-- Node name is ':31' = 'min_tmp5'
-- Equation name is 'min_tmp5', location is LC6_B21, type is buried.
min_tmp5 = DFFE( _EQ011, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ011 = _LC2_B21 & _LC8_B21
# min_tmp5 & !min_tune
# !_LC2_B21 & min_tmp5;
-- Node name is 'min0'
-- Equation name is 'min0', type is output
min0 = min_tmp0;
-- Node name is 'min1'
-- Equation name is 'min1', type is output
min1 = min_tmp1;
-- Node name is 'min2'
-- Equation name is 'min2', type is output
min2 = min_tmp2;
-- Node name is 'min3'
-- Equation name is 'min3', type is output
min3 = min_tmp3;
-- Node name is 'min4'
-- Equation name is 'min4', type is output
min4 = min_tmp4;
-- Node name is 'min5'
-- Equation name is 'min5', type is output
min5 = min_tmp5;
-- Node name is ':30' = 'sec_tmp0'
-- Equation name is 'sec_tmp0', location is LC8_A17, type is buried.
sec_tmp0 = DFFE( _EQ012, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ012 = !_LC2_B21 & sec_tmp0
# sec_tmp0 & !sec_tune
# _LC2_B21 & !sec_tmp0 & sec_tune;
-- Node name is ':29' = 'sec_tmp1'
-- Equation name is 'sec_tmp1', location is LC1_A17, type is buried.
sec_tmp1 = DFFE( _EQ013, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ013 = _LC2_A17 & _LC2_B21
# sec_tmp1 & !sec_tune
# !_LC2_B21 & sec_tmp1;
-- Node name is ':28' = 'sec_tmp2'
-- Equation name is 'sec_tmp2', location is LC5_A16, type is buried.
sec_tmp2 = DFFE( _EQ014, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ014 = _LC2_B21 & _LC4_A16
# sec_tmp2 & !sec_tune
# !_LC2_B21 & sec_tmp2;
-- Node name is ':27' = 'sec_tmp3'
-- Equation name is 'sec_tmp3', location is LC6_A16, type is buried.
sec_tmp3 = DFFE( _EQ015, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ015 = _LC2_B21 & _LC7_A16
# sec_tmp3 & !sec_tune
# !_LC2_B21 & sec_tmp3;
-- Node name is ':26' = 'sec_tmp4'
-- Equation name is 'sec_tmp4', location is LC4_A17, type is buried.
sec_tmp4 = DFFE( _EQ016, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ016 = _LC2_B21 & _LC5_A17
# sec_tmp4 & !sec_tune
# !_LC2_B21 & sec_tmp4;
-- Node name is ':25' = 'sec_tmp5'
-- Equation name is 'sec_tmp5', location is LC3_A17, type is buried.
sec_tmp5 = DFFE( _EQ017, GLOBAL( hz1), GLOBAL(!rst), VCC, VCC);
_EQ017 = _LC2_B21 & _LC7_A17
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