i2c_controller.vhd

用VHDL来实现I2C的功能（实验过）

----------------------------------------------------------------------------------------------
--
-- VHDL file generated by X-HDL - Revision 3.2.54  Aug. 8, 2005 
-- Sun Apr 29 14:30:03 2007
--
--      Input file         : G:/altera_develop_kit/test/I2C_Controller.v
--      Design name        : I2C_Controller
--      Author             : 
--      Company            : 
--
--      Description        : 
--
--
----------------------------------------------------------------------------------------------
--

ENTITY I2C_Controller IS
   PORT (
      CLOCK                   : IN bit;   
      I2C_SCLK                : OUT bit;   
      I2C_SDAT                : INOUT bit;   
      I2C_DATA                : IN bit_vector(23 DOWNTO 0);   
      GO                      : IN bit;   
      END_xhdl1               : OUT bit;   
      W_R                     : IN bit;   
      ACK                     : OUT bit;   
      RESET                   : IN bit;   
      SD_COUNTER              : OUT bit_vector(5 DOWNTO 0);   
      SDO                     : OUT bit);   
END I2C_Controller;

ARCHITECTURE translated OF I2C_Controller IS


   SIGNAL SCLK                     :  bit;   
   SIGNAL SD                       :  bit_vector(23 DOWNTO 0);   
   SIGNAL temp_xhdl7               :  bit;   
   SIGNAL I2C_SCLK_xhdl2           :  bit;   
   SIGNAL temp_xhdl8               :  bit;   
   SIGNAL ACK1                     :  bit;   
   SIGNAL ACK2                     :  bit;   
   SIGNAL ACK3                     :  bit;   
   SIGNAL ACK_xhdl4                :  bit;   
   SIGNAL END_xhdl1_xhdl3          :  bit;   
   SIGNAL SD_COUNTER_xhdl5         :  bit_vector(5 DOWNTO 0);   
   SIGNAL SDO_xhdl6                :  bit;   

BEGIN
   I2C_SCLK <= I2C_SCLK_xhdl2;
   END_xhdl1 <= END_xhdl1_xhdl3;
   ACK <= ACK_xhdl4;
   SD_COUNTER <= SD_COUNTER_xhdl5;
   SDO <= SDO_xhdl6;
   temp_xhdl7 <= NOT CLOCK WHEN ((SD_COUNTER_xhdl5 >= "000100") AND (SD_COUNTER_xhdl5<="011110")) ELSE '0';
   I2C_SCLK_xhdl2 <= SCLK OR (temp_xhdl7) ;
   temp_xhdl8 <= 'Z' WHEN SDO_xhdl6 = '1' ELSE '0';
   I2C_SDAT <= temp_xhdl8 ;
   ACK_xhdl4 <= ACK1 OR ACK2 OR ACK3 ;

   PROCESS
   BEGIN
      WAIT UNTIL (RESET'EVENT AND RESET = '0') OR (CLOCK'EVENT AND CLOCK = '1');
      IF (NOT RESET = '1') THEN
         SD_COUNTER_xhdl5 <= "111111";    
      ELSE
         IF (GO = '0') THEN
            SD_COUNTER_xhdl5 <= "000000";    
         ELSE
            IF (SD_COUNTER_xhdl5 < "111111") THEN
               SD_COUNTER_xhdl5 <= SD_COUNTER_xhdl5 + "000001";    
            END IF;
         END IF;
      END IF;
   END PROCESS;

   PROCESS
   BEGIN
      WAIT UNTIL (RESET'EVENT AND RESET = '0') OR (CLOCK'EVENT AND CLOCK = '1');
      IF (NOT RESET = '1') THEN
         SCLK <= '1';    
         SDO_xhdl6 <= '1';    
         ACK1 <= '0';    
         ACK2 <= '0';    
         ACK3 <= '0';    
         END_xhdl1_xhdl3 <= '1';    
      ELSE
         CASE SD_COUNTER_xhdl5 IS
            WHEN  =>
                     ACK1 <= '0';    
                     ACK2 <= '0';    
                     ACK3 <= '0';    
                     END_xhdl1_xhdl3 <= '0';    
                     SDO_xhdl6 <= '1';    
                     SCLK <= '1';    
            WHEN "000001" =>
                     SD <= I2C_DATA;    
                     SDO_xhdl6 <= '0';    
            WHEN "000010" =>
                     SCLK <= '0';    
            WHEN "000011" =>
                     SDO_xhdl6 <= SD(23);    
            WHEN "000100" =>
                     SDO_xhdl6 <= SD(22);    
            WHEN "000101" =>
                     SDO_xhdl6 <= SD(21);    
            WHEN "000110" =>
                     SDO_xhdl6 <= SD(20);    
            WHEN "000111" =>
                     SDO_xhdl6 <= SD(19);    
            WHEN "001000" =>
                     SDO_xhdl6 <= SD(18);    
            WHEN "001001" =>
                     SDO_xhdl6 <= SD(17);    
            WHEN "001010" =>
                     SDO_xhdl6 <= SD(16);    
            WHEN "001011" =>
                     SDO_xhdl6 <= '1';    
            WHEN "001100" =>
                     SDO_xhdl6 <= SD(15);    
                     ACK1 <= I2C_SDAT;    
            WHEN "001101" =>
                     SDO_xhdl6 <= SD(14);    
            WHEN "001110" =>
                     SDO_xhdl6 <= SD(13);    
            WHEN "001111" =>
                     SDO_xhdl6 <= SD(12);    
            WHEN "010000" =>
                     SDO_xhdl6 <= SD(11);    
            WHEN "010001" =>
                     SDO_xhdl6 <= SD(10);    
            WHEN "010010" =>
                     SDO_xhdl6 <= SD(9);    
            WHEN "010011" =>
                     SDO_xhdl6 <= SD(8);    
            WHEN "010100" =>
                     SDO_xhdl6 <= '1';    
            WHEN "010101" =>
                     SDO_xhdl6 <= SD(7);    
                     ACK2 <= I2C_SDAT;    
            WHEN "010110" =>
                     SDO_xhdl6 <= SD(6);    
            WHEN "010111" =>
                     SDO_xhdl6 <= SD(5);    
            WHEN "011000" =>
                     SDO_xhdl6 <= SD(4);    
            WHEN "011001" =>
                     SDO_xhdl6 <= SD(3);    
            WHEN "011010" =>
                     SDO_xhdl6 <= SD(2);    
            WHEN "011011" =>
                     SDO_xhdl6 <= SD(1);    
            WHEN "011100" =>
                     SDO_xhdl6 <= SD(0);    
            WHEN "011101" =>
                     SDO_xhdl6 <= '1';    
            WHEN "011110" =>
                     SDO_xhdl6 <= '0';    
                     SCLK <= '0';    
                     ACK3 <= I2C_SDAT;    
            WHEN "011111" =>
                     SCLK <= '1';    
            WHEN "100000" =>
                     SDO_xhdl6 <= '1';    
                     END_xhdl1_xhdl3 <= '1';    
            WHEN OTHERS =>
                     NULL;
            
         END CASE;
      END IF;
   END PROCESS;

END translated;