rcvr.qsf

基于vhdl 的串行接口 具有完整的程序

# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		rcvr_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:24:25  SEPTEMBER 23, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 4.2
set_global_assignment -name VHDL_FILE rcvr.vhd
set_global_assignment -name VHDL_FILE txt.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE ../uart/rcvr.vwf
set_global_assignment -name BDF_FILE uart.bdf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_18 -to clk
set_location_assignment PIN_45 -to din[0]
set_location_assignment PIN_44 -to din[1]
set_location_assignment PIN_43 -to din[2]
set_location_assignment PIN_42 -to din[3]
set_location_assignment PIN_41 -to din[4]
set_location_assignment PIN_40 -to din[5]
set_location_assignment PIN_39 -to din[6]
set_location_assignment PIN_38 -to din[7]
set_location_assignment PIN_7 -to sdo
set_location_assignment PIN_37 -to wrn
set_location_assignment PIN_131 -to dout[0]
set_location_assignment PIN_130 -to dout[1]
set_location_assignment PIN_129 -to dout[2]
set_location_assignment PIN_127 -to dout[3]
set_location_assignment PIN_125 -to dout[4]
set_location_assignment PIN_124 -to dout[5]
set_location_assignment PIN_123 -to dout[6]
set_location_assignment PIN_122 -to dout[7]
set_location_assignment PIN_8 -to rxd

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 5
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name TOP_LEVEL_ENTITY uart

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EPM1270T144C5ES
set_global_assignment -name ENABLE_DEVICE_WIDE_RESET OFF

# Assembler Assignments
# =====================
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL 1
set_global_assignment -name VECTOR_INPUT_SOURCE ../uart/rcvr.vwf

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT off