rcvr.map.rpt

基于vhdl 的串行接口 具有完整的程序

+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 78    ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 9     ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 47    ;
; Number of registers using Output Enable      ; 0     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+-----------+
; Hierarchy ;
+-----------+
uart
 |-- rcvr:inst
      |-- lpm_counter:no_bits_rcvd_rtl_1
           |-- cntr_p47:auto_generated
 |-- txt:inst1
      |-- lpm_counter:no_bits_sent_rtl_0
           |-- cntr_p47:auto_generated


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                     ;
+----------------------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------------------------------------------------------------------+
; Compilation Hierarchy Node             ; Logic Cells ; LC Registers ; UFM Blocks ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Full Hierarchy Name                                                    ;
+----------------------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------------------------------------------------------------------+
; |uart                                  ; 126 (0)     ; 78           ; 0          ; 20   ; 0            ; 48 (0)       ; 51 (0)            ; 27 (0)           ; 35 (0)          ; |uart                                                                  ;
;    |rcvr:inst|                         ; 62 (58)     ; 39           ; 0          ; 0    ; 0            ; 23 (23)      ; 30 (30)           ; 9 (5)            ; 18 (14)         ; |uart|rcvr:inst                                                        ;
;       |lpm_counter:no_bits_rcvd_rtl_1| ; 4 (0)       ; 4            ; 0          ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 4 (0)            ; 4 (0)           ; |uart|rcvr:inst|lpm_counter:no_bits_rcvd_rtl_1                         ;
;          |cntr_p47:auto_generated|     ; 4 (4)       ; 4            ; 0          ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 4 (4)            ; 4 (4)           ; |uart|rcvr:inst|lpm_counter:no_bits_rcvd_rtl_1|cntr_p47:auto_generated ;
;    |txt:inst1|                         ; 64 (60)     ; 39           ; 0          ; 0    ; 0            ; 25 (25)      ; 21 (21)           ; 18 (14)          ; 17 (13)         ; |uart|txt:inst1                                                        ;
;       |lpm_counter:no_bits_sent_rtl_0| ; 4 (0)       ; 4            ; 0          ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 4 (0)            ; 4 (0)           ; |uart|txt:inst1|lpm_counter:no_bits_sent_rtl_0                         ;
;          |cntr_p47:auto_generated|     ; 4 (4)       ; 4            ; 0          ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 4 (4)            ; 4 (4)           ; |uart|txt:inst1|lpm_counter:no_bits_sent_rtl_0|cntr_p47:auto_generated ;
+----------------------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------------------------------------------------------------------+


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in F:/quartus/串口/receiver/rcvr.map.eqn.


+------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                   ;
+----------------------------------+-----------------+-------------------------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Name with Absolute Path                                                        ;
+----------------------------------+-----------------+-------------------------------------------------------------------------------------+
; rcvr.vhd                         ; yes             ; F:/quartus/串口/receiver/rcvr.vhd                                                   ;
; txt.vhd                          ; yes             ; F:/quartus/串口/receiver/txt.vhd                                                    ;
; uart.bdf                         ; yes             ; F:/quartus/串口/receiver/uart.bdf                                                   ;
; lpm_counter.tdf                  ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_counter.tdf         ;
; lpm_constant.inc                 ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_constant.inc        ;
; lpm_decode.inc                   ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_decode.inc          ;
; lpm_add_sub.inc                  ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_add_sub.inc         ;
; cmpconst.inc                     ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/cmpconst.inc            ;
; lpm_compare.inc                  ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_compare.inc         ;
; lpm_counter.inc                  ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_counter.inc         ;
; dffeea.inc                       ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/dffeea.inc              ;
; alt_synch_counter.inc            ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/alt_synch_counter.inc   ;
; alt_synch_counter_f.inc          ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc            ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/alt_counter_f10ke.inc   ;
; alt_counter_stratix.inc          ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/alt_counter_stratix.inc ;
; aglobal42.inc                    ; yes             ; d:/program files/altera/qprogrammer/libraries/megafunctions/aglobal42.inc           ;
; db/cntr_p47.tdf                  ; yes             ; F:/quartus/串口/receiver/db/cntr_p47.tdf                                            ;
+----------------------------------+-----------------+-------------------------------------------------------------------------------------+


+---------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+-----------------------------------+---------+
; Resource                          ; Usage   ;
+-----------------------------------+---------+
; Logic cells                       ; 126     ;
; Total combinational functions     ; 75      ;
; Total 4-input functions           ; 25      ;
; Total 3-input functions           ; 7       ;
; Total 2-input functions           ; 8       ;
; Total 1-input functions           ; 34      ;
; Total 0-input functions           ; 1       ;
; Combinational cells for routing   ; 0       ;
; Total registers                   ; 78      ;
; Total logic cells in carry chains ; 35      ;
; I/O pins                          ; 20      ;
; Maximum fan-out node              ; clk     ;
; Maximum fan-out                   ; 31      ;
; Total fan-out                     ; 394     ;
; Average fan-out                   ; 2.70    ;
+-----------------------------------+---------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
    Info: Processing started: Mon Sep 26 10:27:58 2005
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off rcvr -c rcvr
Info: Found 2 design units, including 1 entities, in source file rcvr.vhd
    Info: Found design unit 1: rcvr-v1
    Info: Found entity 1: rcvr
Info: Found 2 design units, including 1 entities, in source file txt.vhd
    Info: Found design unit 1: txt-v1
    Info: Found entity 1: txt
Info: Found 1 design units, including 1 entities, in source file uart.bdf
    Info: Found entity 1: uart
Info: Duplicate registers merged to single register
    Info: Duplicate register "txt:inst1|counter1[0]" merged to single register "rcvr:inst|counter1[0]"
Info: Inferred 2 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "txt:inst1|no_bits_sent[0]~8"
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "rcvr:inst|no_bits_rcvd[0]~8"
Info: Found 1 design units, including 1 entities, in source file d:/program files/altera/qprogrammer/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file db/cntr_p47.tdf
    Info: Found entity 1: cntr_p47
Info: Implemented 146 device resources after synthesis - the final resource count might be different
    Info: Implemented 11 input pins
    Info: Implemented 9 output pins
    Info: Implemented 126 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
    Info: Processing ended: Mon Sep 26 10:28:02 2005
    Info: Elapsed time: 00:00:05