dll_4_map.nlf

倍频详解

Release 9.1i - netgen J.30
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.

Command Line: netgen -intstyle ise -s 6 -pcf dll_4.pcf -rpw 100 -tpw 0 -ar
Structure -tm dll_4 -w -dir netgen/map -ofmt vhdl -sim dll_4_map.ncd
dll_4_map.vhd  

Read and Annotate design 'dll_4_map.ncd' ...
Loading device for application Rf_Device from file '2s15.nph' in environment
D:\Program Files\Xilinx91i.
   "dll_4" is an NCD, version 3.1, device xc2s15, package tq144, speed -6
Loading constraints from 'dll_4.pcf'...
The speed grade (-6) differs from the speed grade specified in the .ncd file
(-6).
The number of routable networks is 8
Flattening design ...
Processing design ... 
  Preping design's networks ...
  Preping design's macros ...
Writing VHDL netlist 'D:\program\ISE\ISE+work\13\dll_4\netgen\map\dll_4_map.vhd'
...
Writing VHDL SDF file
'D:\program\ISE\ISE+work\13\dll_4\netgen\map\dll_4_map.sdf' ...
INFO:NetListWriters:635 - The generated VHDL netlist contains Xilinx SIMPRIM
   simulation primitives and has to be used with SIMPRIM library for correct
   compilation and simulation. 
Number of warnings: 0
Number of info messages: 1
Total memory usage is 84416 kilobytes