time_sim.sdf

The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM mode

          )
        )
  )
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          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
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  )
  (CELL
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        (DELAY
          (ABSOLUTE
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        (DELAY
          (ABSOLUTE
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          (ABSOLUTE
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          (ABSOLUTE
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          (ABSOLUTE
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          (ABSOLUTE
            (PORT I (2092:2092:2092) (2092:2092:2092))
            (IOPATH I O (296:296:296) (296:296:296))
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          (ABSOLUTE
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          (ABSOLUTE
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          (ABSOLUTE
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          (ABSOLUTE
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          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
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          (ABSOLUTE
            (PORT I (1994:1994:1994) (1994:1994:1994))
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          (ABSOLUTE
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            (IOPATH I O (296:296:296) (296:296:296))
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          (ABSOLUTE
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          (ABSOLUTE
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          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
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          (ABSOLUTE
            (IOPATH I O (126:126:126) (126:126:126))
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          (ABSOLUTE
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            (IOPATH I O (606:606:606) (606:606:606))
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          (ABSOLUTE
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          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
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        (DELAY
          (ABSOLUTE
            (PORT I (2397:2397:2397) (2397:2397:2397))
            (IOPATH I O (0:0:0) (0:0:0))
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            (IOPATH I O (126:126:126) (126:126:126))
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          (ABSOLUTE
            (PORT I (2273:2273:2273) (2273:2273:2273))
            (IOPATH I O (606:606:606) (606:606:606))
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          (ABSOLUTE
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          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
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          (ABSOLUTE
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          (ABSOLUTE
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        (DELAY
          (ABSOLUTE
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            (IOPATH I O (296:296:296) (296:296:296))
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          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
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          (ABSOLUTE
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  (CELL
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        (DELAY
          (ABSOLUTE
            (IOPATH I O (126:126:126) (126:126:126))
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          (ABSOLUTE
            (PORT I (2861:2861:2861) (2861:2861:2861))
            (IOPATH I O (606:606:606) (606:606:606))
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