sdrm.twr

The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM mode

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Timing constraint: COMP "sd_data(24)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   6.934ns.
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Timing constraint: COMP "sd_data(25)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.204ns.
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================================================================================
Timing constraint: COMP "sd_data(25)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   7.120ns.
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Timing constraint: COMP "sd_data(26)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.018ns.
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================================================================================
Timing constraint: COMP "sd_data(26)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   6.682ns.
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================================================================================
Timing constraint: COMP "sd_data(29)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.348ns.
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================================================================================
Timing constraint: COMP "sd_data(29)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   6.977ns.
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================================================================================
Timing constraint: COMP "sd_data(0)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.552ns.
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================================================================================
Timing constraint: COMP "sd_data(0)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   7.345ns.
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================================================================================
Timing constraint: COMP "sd_data(17)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.515ns.
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================================================================================
Timing constraint: COMP "sd_data(17)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   7.161ns.
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================================================================================
Timing constraint: COMP "sd_data(19)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   3.544ns.
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================================================================================
Timing constraint: COMP "sd_data(19)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   7.237ns.
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================================================================================
Timing constraint: COMP "sd_data(27)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.388ns.
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================================================================================
Timing constraint: COMP "sd_data(27)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   6.454ns.
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================================================================================
Timing constraint: COMP "sd_data(28)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.464ns.
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================================================================================
Timing constraint: COMP "sd_data(28)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   7.022ns.
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================================================================================
Timing constraint: COMP "sd_data(30)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.895ns.
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================================================================================
Timing constraint: COMP "sd_data(30)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   7.167ns.
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================================================================================
Timing constraint: COMP "sd_data(31)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.895ns.
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================================================================================
Timing constraint: COMP "sd_data(31)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   6.883ns.
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================================================================================
Timing constraint: COMP "sd_data(16)" OFFSET = OUT 2.500 nS  BEFORE COMP "Clkp" ;
 2 items analyzed, 0 timing errors detected.
 Maximum allowable offset is   4.617ns.
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================================================================================
Timing constraint: COMP "sd_data(16)" OFFSET = IN 6.300 nS  AFTER COMP "Clkp" ;
 1 item analyzed, 0 timing errors detected.
 Maximum allowable offset is   7.241ns.
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All constraints were met.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Setup/Hold to clock Clkp
---------------+------------+------------+
               |  Setup to  |  Hold to   |
Source Pad     | clk (edge) | clk (edge) |
---------------+------------+------------+
sd_data(0)     |    2.655(R)|    0.000(R)|
sd_data(1)     |    2.836(R)|    0.000(R)|
sd_data(10)    |    2.700(R)|    0.000(R)|
sd_data(11)    |    2.522(R)|    0.000(R)|
sd_data(12)    |    2.916(R)|    0.000(R)|
sd_data(13)    |    2.568(R)|    0.000(R)|
sd_data(14)    |    2.792(R)|    0.000(R)|
sd_data(15)    |    3.049(R)|    0.000(R)|
sd_data(16)    |    2.759(R)|    0.000(R)|
sd_data(17)    |    2.839(R)|    0.000(R)|
sd_data(18)    |    2.551(R)|    0.000(R)|
sd_data(19)    |    2.763(R)|    0.000(R)|
sd_data(2)     |    2.957(R)|    0.000(R)|
sd_data(20)    |    3.018(R)|    0.000(R)|
sd_data(21)    |    3.243(R)|    0.000(R)|
sd_data(22)    |    2.746(R)|    0.000(R)|
sd_data(23)    |    2.747(R)|    0.000(R)|
sd_data(24)    |    3.066(R)|    0.000(R)|
sd_data(25)    |    2.880(R)|    0.000(R)|
sd_data(26)    |    3.318(R)|    0.000(R)|
sd_data(27)    |    3.546(R)|    0.000(R)|
sd_data(28)    |    2.978(R)|    0.000(R)|
sd_data(29)    |    3.023(R)|    0.000(R)|
sd_data(3)     |    2.967(R)|    0.000(R)|
sd_data(30)    |    2.833(R)|    0.000(R)|
sd_data(31)    |    3.117(R)|    0.000(R)|
sd_data(4)     |    2.964(R)|    0.000(R)|
sd_data(5)     |    3.256(R)|    0.000(R)|
sd_data(6)     |    3.126(R)|    0.000(R)|
sd_data(7)     |    3.159(R)|    0.000(R)|
sd_data(8)     |    2.553(R)|    0.000(R)|
sd_data(9)     |    2.759(R)|    0.000(R)|
---------------+------------+------------+

Clock Clkp to Pad
---------------+------------+
               | clk (edge) |
Destination Pad|   to PAD   |
---------------+------------+
sd_add(0)      |    6.589(R)|
sd_add(1)      |    6.399(R)|
sd_add(10)     |    5.422(R)|
sd_add(2)      |    5.455(R)|
sd_add(3)      |    5.466(R)|
sd_add(4)      |    6.408(R)|
sd_add(5)      |    6.085(R)|
sd_add(6)      |    6.117(R)|
sd_add(7)      |    5.986(R)|
sd_add(8)      |    5.565(R)|
sd_add(9)      |    5.488(R)|