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📄 mx25l1605.v

📁 Verilog based simluation model for MXIC SPI Flash.
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                                               //  end                                       end                                   end                                   end                           end                            if (pmode == 0) begin                               {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0};                           end                               else begin                               {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0};                           end                       end                       end                    pp_p = #90 1'b0;                   disable page_program;                end                else if (status_reg[0] == 1'b0)begin  // count how many bits been shifted                    if ( dpmode == 1'b0 ) begin // do work on non deep power down mode                        if ( pmode == 1'b0 ) begin                            tmp_int = tmp_int + 1;                        end                            else begin                            { psi_reg[ 256*8-1:0 ] } = { psi_reg[ 256*8-9:0 ],                             {latch_SO,latch_PO6,latch_PO5,latch_PO4,latch_PO3,latch_PO2,latch_PO1,latch_PO0}                            };                            tmp_int = tmp_int + 8;                        end                    end                    end            end  // end forever        end    endtask        /*---------------------------------------------------------------*/    /*  Description: define a deep power down (DP)                   */    /*---------------------------------------------------------------*/    task deep_power_down;        begin            //$display( $stime, " Old DP Mode Register = %b", dpmode );            if (pmode == 0) begin                {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0};            end                else begin                {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0};            end            forever begin             @( posedge CS );               if( CS == 1'b1 ) begin                   if ( dpmode == 1'b0 ) begin // do work on non deep power down mode (1)                      if (pmode == 0) begin                          {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0};                      end                          else begin                          {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0};                      end                      dpmode <= #tDP 1'b1;                      //$display( $stime, " New DP Mode Register = %b", dpmode );                  end                      disable deep_power_down;               end            end // end forever           end    endtask    /*---------------------------------------------------------------*/    /*  Description: define a enter 4kb sector task                  */    /*---------------------------------------------------------------*/    task enter_4kb_sector;        begin            //$display( $stime, " Old Enter 4kb Sector Register = %b", enter4kbmode );            forever begin             @( posedge CS );               if( CS == 1'b1 ) begin                                 if ( dpmode == 1'b0 ) begin // do work on non deep power down mode (1)                      if (status_reg[0] == 1'b0) begin // WIP (2)                          enter4kbmode = 1;                          //$display( $stime, " New Enter 4kb Sector Register = %b", enter4kbmode );                          disable enter_4kb_sector;                      end                      end                   end            end  // end forever         end    endtask        /*---------------------------------------------------------------*/    /*  Description: define a exit 4kb sector task                   */    /*---------------------------------------------------------------*/    task exit_4kb_sector;        begin            //$display( $stime, " Old Enter 4kb Sector Register = %b", enter4kbmode );            forever begin             @( posedge CS );               if( CS == 1'b1 ) begin                                 if ( dpmode == 1'b0 ) begin // do work on non deep power down mode (1)                      if (status_reg[0] == 1'b0) begin // WIP (2)                          enter4kbmode = 0;                          //$display( $stime, " New Enter 4kb Sector Register = %b", enter4kbmode );                          disable exit_4kb_sector;                      end                      end                   end              end // end forever           end    endtask    /*---------------------------------------------------------------*/    /*  Description: define a release from deep power dwon task (RDP)*/    /*---------------------------------------------------------------*/    task release_from_deep_power_dwon;        begin            //$display( $stime, " Old DP Mode Register = %b", dpmode );            forever begin             @( posedge SCLK or posedge CS );               if( CS == 1'b1 ) begin                  dpmode <= #tRES2 1'b0;                  //$display( $stime, " New DP Mode Register = %b", dpmode );                  disable release_from_deep_power_dwon;               end                else begin                         //$display( $stime, " Enter Read Electronic ID Function ...");                         dummy_cycle( 23 );                         read_electronic_id;                         //$display( $stime, " Leave Read Electronic ID Function ...");                         disable release_from_deep_power_dwon;               end            end // end forever           end    endtask        /*---------------------------------------------------------------*/    /*  Description: define a read electronic ID (RES)               */    /*               AB X X X                                        */    /*---------------------------------------------------------------*/    task read_electronic_id;        reg  [ 7:0 ] dummy_ID;        begin            //$display( $stime, " Old DP Mode Register = %b", dpmode );            if (pmode == 0) begin                {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0};            end                else begin                {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0};            end            dummy_ID = ID_Device;            forever begin             @( negedge SCLK or posedge CS );               if( CS == 1'b1 ) begin                  if (pmode == 0) begin                      {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0};                  end                      else begin                      {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0};                  end                   {SO_reg,PO_reg6,PO_reg5,PO_reg4,PO_reg3,PO_reg2,PO_reg1,PO_reg0}                   <= #tCLQV {1'bz,1'bz,1'bz,1'bz,1'bz,1'bz,1'bz,1'bz};                  dpmode <= #tRES2 1'b0;                  //$display( $stime, " New DP Mode Register = %b", dpmode );                      disable read_electronic_id;               end                else begin                    if ( pmode == 1'b0 ) begin                        { SO_reg, dummy_ID } <=  #tCLQV { dummy_ID, dummy_ID[ 7 ] };                    end                     else begin                        {SO_reg,PO_reg6,PO_reg5,PO_reg4,PO_reg3,PO_reg2,PO_reg1,PO_reg0}                         <= #tCLQV ID_Device;                     end               end            end // end forever           end    endtask    /*---------------------------------------------------------------*/    /*  Description: define a read electronic manufacturer & device ID */    /*---------------------------------------------------------------*/    task read_electronic_manufacturer_device_id;        reg  [ 15:0 ] dummy_ID;        integer dummy_count;        begin            //$width(negedge SCLK,1);            //$period( posedge SCLK, tCY );    // SCLK _/~ -> _/~            if ( si_reg[0]==1'b0 ) begin                dummy_ID = {ID_MXIC,ID_Device};            end            else begin                dummy_ID = {ID_Device,ID_MXIC};            end            dummy_count = 0;            forever begin                @( negedge SCLK or posedge CS );                if ( CS == 1'b1 ) begin                    if ( dpmode == 1'b0 ) begin // do work on non deep power down mode                       {SO_reg,PO_reg6,PO_reg5,PO_reg4,PO_reg3,PO_reg2,PO_reg1,PO_reg0} <= #tCLQV {1'bz,1'bz,1'bz,1'bz,1'bz,1'bz,1'bz,1'bz};                    end                        disable read_electronic_manufacturer_device_id;                end                else begin                     if ( dpmode == 1'b0 ) begin // do work on non deep power down mode                         if ( pmode == 1'b0) begin // check parallel mode (2)                             { SO_reg, dummy_ID } <=  #tCLQV { dummy_ID, dummy_ID[ 15 ] };                         end                             else begin                             if ( dummy_count == 0 ) begin                                 {SO_reg,PO_reg6,PO_reg5,PO_reg4,PO_reg3,PO_reg2,PO_reg1,PO_reg0} =  #tCLQV dummy_ID[15:8];                                 dummy_count = 1;                             end                             else begin                                 {SO_reg,PO_reg6,PO_reg5,PO_reg4,PO_reg3,PO_reg2,PO_reg1,PO_reg0} =  #tCLQV dummy_ID[7:0];                                 dummy_count = 0;                             end                         end                     end                    end            end  // end forever        end    endtask        /*---------------------------------------------------------------*/    /*  Description: define a program chip task                      */    /*  INPUT                                                        */    /*      segment: segment address                                 */    /*      offset : offset address                                  */    /*---------------------------------------------------------------*/    task update_array;        input [12:0] segment;        input [7:0]  offset;        reg   [`FLASH_ADDR - 1:0] rom_addr;    // rom_addr = {segment, offset}        integer dummy_count, tmp_int;        reg   [`SECTOR_ADDR - 1:0]  sector;        begin            dummy_count = 256;            /*------------------------------------------------*/            /*  Store 256 bytes back to ROM Page              */            /*------------------------------------------------*/            if ( dpmode == 1'b0 ) begin // do work on non deep power down mode (1)                if (status_reg[0] == 1'b0) begin // WIP (2)                    sector[`SECTOR_ADDR - 1:0] = rom_addr[`FLASH_ADDR - 1:16];                    if ( wp_reg !=1'b0 || status_reg[7]!=1'b1 ) begin // protected mode (3)                        if ( status_reg[1] == 1'b1 ) begin // WEL:Write Enable Latch (4)                            if ( protected_area(sector[`SECTOR_ADDR - 1:0]) == 1'b0 ) begin // check protected area (5)                                // initial start rom addrress                                offset = 8'h00;                                rom_addr[`FLASH_ADDR - 1:0] = { segment[12:0], offset[7:0] };                                // in write operation                                status_reg[0]<= 1'b1;                                // not in write operation after PROG_TIME                                status_reg[0]<= #`PROG_TIME 1'b0;                                // WEL : write enable latch                                status_reg[1]<= #`PROG_TIME 1'b0;                                if ( enter4kbmode == 1'b0 ) begin // enter4kbmode = 1'b0 (6)                                    while ( dummy_count ) begin                                           rom_addr[`FLASH_ADDR - 1:0] = { segment[12:0], offset[7:0] };                                           dummy_count = dummy_count - 1;                                           tmp_int = dummy_count << 3; /* byte to bit */                                            ROM_ARRAY[ rom_addr ] <= #`PROG_TIME                                           { dummy_A[ tmp_int+7 ], dummy_A[ tmp_int+6 ],                                             dummy_A[ tmp_int+5 ], dummy_A[ tmp_int+4 ],                                             dummy_A[ tmp_int+3 ], dummy_A[ tmp_int+2 ],                                             dummy_A[ tmp_int+1 ], dummy_A[ tmp_int 

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