mx25l1605.v

Verilog based simluation model for MXIC SPI Flash.

                        end
                    end   
                    disable fast_read_data;
                end 
                else if ( status_reg[0] == 1'b0 ) begin //WIP:write in rpocess bit = 0 (1)
                         if ( dpmode == 1'b0) begin //do work on non deep power down mode 
                             if ( pmode == 1'b0) begin // check parallel mode (2)
                                 if ( dummy_count ) begin
                                          { SO_reg, out_buf } <= #tCLQV { out_buf, out_buf[6] };
                                          dummy_count = dummy_count - 1;
                                 end
                                 else begin
                                           rom_addr = rom_addr + 1;
                                           if ( enter4kbmode == 1'b0 ) begin // enter4kbmode = 1'b0 (3)
                                               out_buf = ROM_ARRAY[ rom_addr ]; 
                                           end
                                           else begin // in enter4kbmode
                                                     out_buf = ROM_4Kb_ARRAY[ rom_addr ]; 
                                           end
                                           { SO_reg, out_buf } <= #tCLQV { out_buf, out_buf[6] };
                                           dummy_count = 7 ;
                                 end 
                             end  
                             else begin
                                       if ( enter4kbmode == 1'b0 ) begin // enter4kbmode = 1'b0 (3)
                                           out_buf = ROM_ARRAY[ rom_addr ]; 
                                       end
                                       else begin // in enter4kbmode
                                                 out_buf = ROM_4Kb_ARRAY[ rom_addr ]; 
                                       end
                                       {SO_reg,PO_reg6,PO_reg5,PO_reg4,PO_reg3,PO_reg2,PO_reg1,PO_reg0} 
                                       <= #tCLQV {out_buf};
                                       rom_addr = rom_addr + 1;
                                       //{SO,PO6,PO5,PO4,PO3,PO2,PO1,PO0} <= #tCLQV out_buf;
                             end
                         end    
                end    
            end  // end forever
        end   
    endtask
    
    /*---------------------------------------------------------------*/
    /*  Description: define a parallel mode task                     */
    /*---------------------------------------------------------------*/
    task parallel_mode;
        begin
            @( posedge CS );
            if( CS == 1'b1 ) begin
               if ( dpmode == 1'b0) begin //do work on non deep power down mode 
                   //$display( $stime, " Old Pmode Register = %b", pmode );
                   pmode = 1;
                   {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0};
                   //$display( $stime, " New Pmode Register = %b", pmode );
               end    
            end  
        end
    endtask

    /*---------------------------------------------------------------*/
    /*  Description: define a sector erase task                      */
    /*               20(D8) AD1 AD2 AD3                              */
    /*---------------------------------------------------------------*/
    task sector_erase;
        reg [`SECTOR_ADDR - 1:0] sector; 
        reg [15:0] offset; // 64K Byte
        reg [`FLASH_ADDR - 1:0] rom_addr;
        
        integer i, start_addr,end_addr,start_4kb_addr,end_4kb_addr;
        reg bp0;
        reg bp1;
        reg bp2;
        reg bp3;
        begin
            sector[`SECTOR_ADDR - 1:0] = si_reg[22:16];
            offset = 16'h0;
            start_addr = (si_reg[23:16]<<16) + 16'h0000;
            end_addr = (si_reg[23:16]<<16) + 16'hffff;            
            start_4kb_addr = 9'h000;
            end_4kb_addr = 9'h1ff;            
            if ( dpmode == 1'b0) begin //do work on non deep power down mode 
                if (pmode == 0) begin
                    {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0};
                end    
                else begin
                    {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0};
                end
            end    
            forever begin
             @( posedge CS );
               if( CS == 1'b1 ) begin
                  if ( dpmode == 1'b0) begin //do work on non deep power down mode 
                      if (pmode == 0) begin
                          {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0};
                      end    
                      else begin
                          {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0};
                      end
                      if(wp_reg==1'b0||status_reg[7]==1'b1) begin
                         // Protected Mode
                      end 
                      else if(dpmode == 1'b1) begin
                         // deep power down mode
                      end
                      else begin   
                           if ( protected_area(sector[`SECTOR_ADDR - 1:0]) == 1'b1) begin
                           end 
                           else if ( 16 <= sector && sector <=31 && bp2==1'b1 && bp1==1'b0 && bp0 ==1'b1) begin
                           end
                           else begin
                                //WIP : write in process bit
                                status_reg[0] =  1'b1;
                                if ( enter4kbmode == 1'b0 ) begin // enter4kbmode = 1'b0
                                    for( i = start_addr; i < (end_addr+1); i = i + 1 )
                                    begin
                                        ROM_ARRAY[ i ] <= #`ERASE_TIME 8'hff;
                                    end
                                end    
                                else begin // on enter4kbmode
                                          if ( si_reg[21:9]==0 ) begin // A21~A9=0 , A8~A0 customer defined
                                              for( i = start_4kb_addr; i < (end_4kb_addr + 1); i = i + 1 )
                                              begin
                                                  ROM_4Kb_ARRAY[ i ] <= #`ERASE_TIME 8'hff;
                                              end
                                          end    
                                end
                                //WIP : write in process bit
                                status_reg[0] <=  #`ERASE_TIME 1'b0;//WIP
                                //WEL : write enable latch
                                status_reg[1] <=  #`ERASE_TIME 1'b0;//WEL
                           end     
                      end   
                   end   
                            disable sector_erase;
               end    
            end // end forever
        end
    endtask
    

    /*---------------------------------------------------------------*/
    /*  Description: define a chip erase task                        */
    /*               60(C7)                                          */
    /*---------------------------------------------------------------*/
    task chip_erase;
        integer i;

        begin
            forever begin
             @( posedge CS );
               if( CS == 1'b1 ) begin  
                  if ( dpmode == 1'b0 ) begin // do work on non deep power down mode
                      if ( enter4kbmode == 1'b0) begin //do work on non enter4kbmode
                          if ( wp_reg !=1'b0 && status_reg[7]!=1'b1 ) begin// protected mode
                              if ( status_reg[1] == 1'b1 ) begin //WEL:Write Enable Latch
                                  if ( status_reg[2] == 1'b0 && status_reg[3] == 1'b0 && status_reg[3] == 1'b0 ) begin
                                     // WIP : write in process bit
                                      chip_erase_oe = 1'b1;
                                      status_reg[0] <= 1'b1;
                                     // for( i = 0; i < FLASH_SIZE; i = i+1 )
                                     // begin
                                     //     ROM_ARRAY[ i ] <= #`CHIP_ERASE_TIME 8'hff;
                                     // end
                                     // //WIP : write in process bit
                                     // status_reg[0] <=  #`CHIP_ERASE_TIME 1'b0;//WIP
                                     // //WEL : write enable latch
                                     // status_reg[1] <=  #`CHIP_ERASE_TIME 1'b0;//WEL
                                  end   
                              end
                          end
                      end // end enter4kbmode == 1'b0
                  end    
                  disable chip_erase;
               end // CS == 1'b1
            end // end forever    
        end
    endtask

    /*---------------------------------------------------------------*/
    /*  Description: define a page program task                      */
    /*               02 AD1 AD2 AD3                                  */
    /*---------------------------------------------------------------*/
    task page_program;
        input  [12:0]      segment;
        input  [7:0]       offset;
        reg    [`FLASH_ADDR - 1:0]      rom_addr;    // rom_addr = {segment, offset}
        integer dummy_count, tmp_int, i;

        begin
            dummy_count = 256;    // page size
            offset[7:0] = 8'h00;  // the start address of the page
            rom_addr[`FLASH_ADDR - 1:0] = { segment[ 12:0 ],offset[7:0] };
            
            /*------------------------------------------------*/
            /*  Store 256 bytes into a temp buffer - dummy_A  */
            /*------------------------------------------------*/
            while ( dummy_count ) begin
                rom_addr[`FLASH_ADDR - 1:0 ] = { segment[ 12:0 ], offset[ 7:0 ] };
                dummy_count = dummy_count - 1;
                tmp_int = dummy_count << 3;    /* transfer byte to bit */
                { dummy_A[ tmp_int+7 ], dummy_A[ tmp_int+6 ],
                  dummy_A[ tmp_int+5 ], dummy_A[ tmp_int+4 ],
                  dummy_A[ tmp_int+3 ], dummy_A[ tmp_int+2 ],
                  dummy_A[ tmp_int+1 ], dummy_A[ tmp_int ] } =
                ROM_ARRAY[ rom_addr ];

                offset = offset + 1;
            end

            tmp_int = 0;
            sector[`SECTOR_ADDR - 1:0] = rom_addr[`FLASH_ADDR - 1:16];
            address[23:0] = si_reg[23:0];
            if (pmode == 0) begin
                {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0};
            end    
            else begin
                {ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0};
                pp_p = #100 1'b1;
            end
            forever begin
                @( posedge SCLK or posedge CS );
                if ( CS == 1'b1 ) begin
                   if ( dpmode == 1'b0 ) begin // do work on non deep power down mode
                       if ( status_reg[0] == 1'b0 ) begin //WIP 
                           if ( wp_reg !=1'b0 && status_reg[7]!=1'b1 ) begin// protected mode
                               if ( status_reg[1] == 1'b1 ) begin //WEL:Write Enable Latch
                                   if ( protected_area(sector[`SECTOR_ADDR - 1:0]) == 1'b0 ) begin // check protected area (3)
                                       //$display( $stime, " Total write %d bits", tmp_int );
                                       if ( pmode == 1'b0 ) begin
                                           for( i = 1; i <= tmp_int; i=i+1 ) begin
                                               if( dummy_A[ 256*8-i ] == 1'b1 ) begin // 1 -> 1 ,1 -> 0
                                                   dummy_A[ 256*8-i ] = si_reg[ tmp_int-i ];
                                               end
                                           end
                                       end    
                                       else begin
                                               for( i = 1; i <= tmp_int; i=i+1 ) begin
                                                   if( dummy_A[ 256*8-i ] == 1'b1 ) begin // 1 -> 1 ,1 -> 0
                                                       dummy_A[ 256*8-i ] = psi_reg[ tmp_int-i ];
                                                   end
                                               end

                                               //  for( i = 1; i <= tmp_int; i=i+8 ) begin
                                               //      if( dummy_A[ 256*8-i-0 ] == 1'b1 ) begin
                                               //         dummy_A[ 256*8-i-0 ] = psi_reg[ tmp_int-i-0 ];
                                               //      end
                                               //      if( dummy_A[ 256*8-i-1 ] == 1'b1 ) begin
                                               //         dummy_A[ 256*8-i-1 ] = psi_reg[ tmp_int-i-1 ];
                                               //      end   
                                               //      if( dummy_A[ 256*8-i-2 ] == 1'b1 ) begin
                                               //         dummy_A[ 256*8-i-2 ] = psi_reg[ tmp_int-i-2 ];
                                               //      end   
                                               //      if( dummy_A[ 256*8-i-3 ] == 1'b1 ) begin
                                               //         dummy_A[ 256*8-i-3 ] = psi_reg[ tmp_int-i-3 ];
                                               //      end   
                                               //      if( dummy_A[ 256*8-i-4 ] == 1'b1 ) begin
                                               //         dummy_A[ 256*8-i-4 ] = psi_reg[ tmp_int-i-4 ];
                                               //      end
                                               //      if( dummy_A[ 256*8-i-5 ] == 1'b1 ) begin 
                                               //         dummy_A[ 256*8-i-5 ] = psi_reg[ tmp_int-i-5 ];
                                               //      end   
                                               //      if( dummy_A[ 256*8-i-6 ] == 1'b1 ) begin 
                                               //         dummy_A[ 256*8-i-6 ] = psi_reg[ tmp_int-i-6 ];
                                               //      end
                                               //      if( dummy_A[ 256*8-i-7 ] == 1'b1 ) begin 
                                               //         dummy_A[ 256*8-i-7 ] = psi_reg[ tmp_int-i-7 ];
                                               //      end