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📄 trafficlight.fit.qmsg

📁 采用Verilog HDL语言编写的交通灯控制系统
💻 QMSG
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.2 Build 157 12/07/2004 SJ Full Version " "Info: Version 4.2 Build 157 12/07/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun May 28 11:10:06 2006 " "Info: Processing started: Sun May 28 11:10:06 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --import_settings_files=off --export_settings_files=off trafficlight -c trafficlight " "Info: Command: quartus_fit --import_settings_files=off --export_settings_files=off trafficlight -c trafficlight" {  } {  } 0}
{ "Info" "IMPP_MPP_AUTO_ASSIGNED_DEVICE" "trafficlight EP1C3T100C6 " "Info: Automatically selected device EP1C3T100C6 for design trafficlight" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " {  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "19 19 " "Info: No exact pin location assignment(s) for 19 pins of 19 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Red1 " "Info: Pin Red1 not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 656 784 960 672 "Red1" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "Red1" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { Red1 } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { Red1 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Red2 " "Info: Pin Red2 not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 672 784 960 688 "Red2" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "Red2" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { Red2 } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { Red2 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Yellow1 " "Info: Pin Yellow1 not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 688 784 960 704 "Yellow1" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "Yellow1" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { Yellow1 } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { Yellow1 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Yellow2 " "Info: Pin Yellow2 not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 704 784 960 720 "Yellow2" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "Yellow2" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { Yellow2 } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { Yellow2 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Green1 " "Info: Pin Green1 not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 720 784 960 736 "Green1" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "Green1" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { Green1 } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { Green1 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Green2 " "Info: Pin Green2 not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 736 784 960 752 "Green2" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "Green2" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { Green2 } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { Green2 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Data\[7\] " "Info: Pin SEG_Data\[7\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 760 784 960 776 "SEG_Data\[7..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Data\[7\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Data[7] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Data[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Data\[6\] " "Info: Pin SEG_Data\[6\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 760 784 960 776 "SEG_Data\[7..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Data\[6\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Data[6] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Data[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Data\[5\] " "Info: Pin SEG_Data\[5\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 760 784 960 776 "SEG_Data\[7..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Data\[5\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Data[5] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Data[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Data\[4\] " "Info: Pin SEG_Data\[4\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 760 784 960 776 "SEG_Data\[7..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Data\[4\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Data[4] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Data[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Data\[3\] " "Info: Pin SEG_Data\[3\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 760 784 960 776 "SEG_Data\[7..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Data\[3\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Data[3] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Data[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Data\[2\] " "Info: Pin SEG_Data\[2\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 760 784 960 776 "SEG_Data\[7..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Data\[2\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Data[2] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Data[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Data\[1\] " "Info: Pin SEG_Data\[1\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 760 784 960 776 "SEG_Data\[7..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Data\[1\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Data[1] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Data[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Data\[0\] " "Info: Pin SEG_Data\[0\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 760 784 960 776 "SEG_Data\[7..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Data\[0\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Data[0] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Data[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Sel\[1\] " "Info: Pin SEG_Sel\[1\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 776 784 960 792 "SEG_Sel\[1..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Sel\[1\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Sel[1] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Sel[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SEG_Sel\[0\] " "Info: Pin SEG_Sel\[0\] not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 776 784 960 792 "SEG_Sel\[1..0\]" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SEG_Sel\[0\]" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SEG_Sel[0] } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SEG_Sel[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Reset " "Info: Pin Reset not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 728 240 408 744 "Reset" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "Reset" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { Reset } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { Reset } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SW " "Info: Pin SW not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 752 240 408 768 "SW" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SW" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { SW } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { SW } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "CLK " "Info: Pin CLK not assigned to an exact location on the device" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 776 240 408 792 "CLK" "" } } } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } } { "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" "" { Report "F:/dolphin/trafficlight/db/trafficlight_cmp.qrpt" Compiler "trafficlight" "UNKNOWN" "V1" "F:/dolphin/trafficlight/db/trafficlight.quartus_db" { Floorplan "F:/dolphin/trafficlight/" "" "" { CLK } "NODE_NAME" } "" } } { "F:/dolphin/trafficlight/trafficlight.fld" "" { Floorplan "F:/dolphin/trafficlight/trafficlight.fld" "" "" { CLK } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "CLK Global clock in PIN 10 " "Info: Automatically promoted signal \"CLK\" to use Global clock in PIN 10" {  } { { "trafficlight.bdf" "" { Schematic "F:/dolphin/trafficlight/trafficlight.bdf" { { 776 240 408 792 "CLK" "" } } } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "fdiv1khz:inst12\|clk_out Global clock " "Info: Automatically promoted signal \"fdiv1khz:inst12\|clk_out\" to use Global clock" {  } { { "fdiv1khz.v" "" { Text "F:/dolphin/trafficlight/fdiv1khz.v" 3 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "fdiv1hz:inst11\|clk_out Global clock " "Info: Automatically promoted signal \"fdiv1hz:inst11\|clk_out\" to use Global clock" {  } { { "fdiv1hz.v" "" { Text "F:/dolphin/trafficlight/fdiv1hz.v" 3 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "scan:inst\|EN_in Global clock " "Info: Automatically promoted signal \"scan:inst\|EN_in\" to use Global clock" {  } { { "scan.v" "" { Text "F:/dolphin/trafficlight/scan.v" 9 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_LUT_IO_RAM_PACKING" "" "Info: Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" {  } {  } 0}

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