📄 inter.tan.qmsg
字号:
{ "Info" "ITDB_FULL_TPD_RESULT" "DSP_RW DATA_IO\[0\] 14.200 ns Longest " "Info: Longest tpd from source pin \"DSP_RW\" to destination pin \"DATA_IO\[0\]\" is 14.200 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.400 ns) 1.400 ns DSP_RW 1 PIN PIN_10 23 " "Info: 1: + IC(0.000 ns) + CELL(1.400 ns) = 1.400 ns; Loc. = PIN_10; Fanout = 23; PIN Node = 'DSP_RW'" { } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "" { DSP_RW } "NODE_NAME" } "" } } { "inter.bdf" "" { Schematic "E:/otherpersondata/hk/Inter(629)/inter.bdf" { { 416 -208 -40 432 "DSP_RW" "" } } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.000 ns) + CELL(3.800 ns) 8.200 ns inst7~42 2 COMB SEXP81 6 " "Info: 2: + IC(3.000 ns) + CELL(3.800 ns) = 8.200 ns; Loc. = SEXP81; Fanout = 6; COMB Node = 'inst7~42'" { } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "6.800 ns" { DSP_RW inst7~42 } "NODE_NAME" } "" } } { "inter.bdf" "" { Schematic "E:/otherpersondata/hk/Inter(629)/inter.bdf" { { 416 96 160 496 "inst7" "" } } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.400 ns) 12.600 ns altdpram0:inst\|altdpram:altdpram_component\|xql\[0\]~94 3 COMB LOOP LC91 3 " "Info: 3: + IC(0.000 ns) + CELL(4.400 ns) = 12.600 ns; Loc. = LC91; Fanout = 3; COMB LOOP Node = 'altdpram0:inst\|altdpram:altdpram_component\|xql\[0\]~94'" { { "Info" "ITDB_PART_OF_SCC" "altdpram0:inst\|altdpram:altdpram_component\|xql\[0\]~94 LC91 " "Info: Loc. = LC91; Node \"altdpram0:inst\|altdpram:altdpram_component\|xql\[0\]~94\"" { } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "" { altdpram0:inst|altdpram:altdpram_component|xql[0]~94 } "NODE_NAME" } "" } } } 0} } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "" { altdpram0:inst|altdpram:altdpram_component|xql[0]~94 } "NODE_NAME" } "" } } { "altdpram.tdf" "" { Text "d:/altera/quartus42/libraries/megafunctions/altdpram.tdf" 368 10 0 } } { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "4.400 ns" { inst7~42 altdpram0:inst|altdpram:altdpram_component|xql[0]~94 } "NODE_NAME" } "" } } { "altdpram.tdf" "" { Text "d:/altera/quartus42/libraries/megafunctions/altdpram.tdf" 368 10 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.600 ns) 14.200 ns DATA_IO\[0\] 4 PIN PIN_58 0 " "Info: 4: + IC(0.000 ns) + CELL(1.600 ns) = 14.200 ns; Loc. = PIN_58; Fanout = 0; PIN Node = 'DATA_IO\[0\]'" { } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "1.600 ns" { altdpram0:inst|altdpram:altdpram_component|xql[0]~94 DATA_IO[0] } "NODE_NAME" } "" } } { "inter.bdf" "" { Schematic "E:/otherpersondata/hk/Inter(629)/inter.bdf" { { 520 480 656 536 "DATA_IO\[7..0\]" "" } } } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "11.200 ns 78.87 % " "Info: Total cell delay = 11.200 ns ( 78.87 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.000 ns 21.13 % " "Info: Total interconnect delay = 3.000 ns ( 21.13 % )" { } { } 0} } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "14.200 ns" { DSP_RW inst7~42 altdpram0:inst|altdpram:altdpram_component|xql[0]~94 DATA_IO[0] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "14.200 ns" { DSP_RW DSP_RW~out inst7~42 altdpram0:inst|altdpram:altdpram_component|xql[0]~94 DATA_IO[0] } { 0.000ns 0.000ns 3.000ns 0.000ns 0.000ns } { 0.000ns 1.400ns 3.800ns 4.400ns 1.600ns } } } } 0}
{ "Info" "ITDB_TH_RESULT" "ReadKeyValBlock:inst4\|INPUT_Register\[0\] Key_SDAT CPLD_CLKIN 4.300 ns register " "Info: th for register \"ReadKeyValBlock:inst4\|INPUT_Register\[0\]\" (data pin = \"Key_SDAT\", clock pin = \"CPLD_CLKIN\") is 4.300 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CPLD_CLKIN destination 10.100 ns + Longest register " "Info: + Longest clock path from clock \"CPLD_CLKIN\" to destination register is 10.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 2.500 ns CPLD_CLKIN 1 CLK PIN_90 10 " "Info: 1: + IC(0.000 ns) + CELL(2.500 ns) = 2.500 ns; Loc. = PIN_90; Fanout = 10; CLK Node = 'CPLD_CLKIN'" { } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "" { CPLD_CLKIN } "NODE_NAME" } "" } } { "inter.bdf" "" { Schematic "E:/otherpersondata/hk/Inter(629)/inter.bdf" { { -336 8 176 -320 "CPLD_CLKIN" "" } } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 5.000 ns CLK_DIV:inst6\|Key_CLK 2 REG LC1 43 " "Info: 2: + IC(0.000 ns) + CELL(2.500 ns) = 5.000 ns; Loc. = LC1; Fanout = 43; REG Node = 'CLK_DIV:inst6\|Key_CLK'" { } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "2.500 ns" { CPLD_CLKIN CLK_DIV:inst6|Key_CLK } "NODE_NAME" } "" } } { "CLK_DIV.vhd" "" { Text "E:/otherpersondata/hk/Inter(629)/CLK_DIV.vhd" 41 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.900 ns) + CELL(2.200 ns) 10.100 ns ReadKeyValBlock:inst4\|INPUT_Register\[0\] 3 REG LC63 10 " "Info: 3: + IC(2.900 ns) + CELL(2.200 ns) = 10.100 ns; Loc. = LC63; Fanout = 10; REG Node = 'ReadKeyValBlock:inst4\|INPUT_Register\[0\]'" { } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "5.100 ns" { CLK_DIV:inst6|Key_CLK ReadKeyValBlock:inst4|INPUT_Register[0] } "NODE_NAME" } "" } } { "ReadKeyValBlock.vhd" "" { Text "E:/otherpersondata/hk/Inter(629)/ReadKeyValBlock.vhd" 111 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "7.200 ns 71.29 % " "Info: Total cell delay = 7.200 ns ( 71.29 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.900 ns 28.71 % " "Info: Total interconnect delay = 2.900 ns ( 28.71 % )" { } { } 0} } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "10.100 ns" { CPLD_CLKIN CLK_DIV:inst6|Key_CLK ReadKeyValBlock:inst4|INPUT_Register[0] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "10.100 ns" { CPLD_CLKIN CPLD_CLKIN~out CLK_DIV:inst6|Key_CLK ReadKeyValBlock:inst4|INPUT_Register[0] } { 0.000ns 0.000ns 0.000ns 2.900ns } { 0.000ns 2.500ns 2.500ns 2.200ns } } } } 0} { "Info" "ITDB_FULL_TH_DELAY" "1.300 ns + " "Info: + Micro hold delay of destination is 1.300 ns" { } { { "ReadKeyValBlock.vhd" "" { Text "E:/otherpersondata/hk/Inter(629)/ReadKeyValBlock.vhd" 111 -1 0 } } } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.100 ns - Shortest pin register " "Info: - Shortest pin to register delay is 7.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Key_SDAT 1 PIN PIN_79 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_79; Fanout = 1; PIN Node = 'Key_SDAT'" { } { { "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" "" { Report "E:/otherpersondata/hk/Inter(629)/db/Inter_cmp.qrpt" Compiler "Inter" "UNKNOWN" "V1" "E:/otherpersondata/hk/Inter(629)/db/Inter.quartus_db" { Floorplan "E:/otherpersondata/hk/Inter(629)/" "" "" { Key_SDAT } "NODE_NAME" } "" } } { "inter.bdf" "" { Schematic "E:/otherperso
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -