📄 inter.map.rpt
字号:
; a_rdenreg.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/a_rdenreg.inc ;
; altqpram.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/altqpram.inc ;
; alt_le_rden_reg.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/alt_le_rden_reg.inc ;
; altsyncram.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/altsyncram.inc ;
; aglobal42.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/aglobal42.inc ;
; lpm_mux.tdf ; yes ; d:/altera/quartus42/libraries/megafunctions/lpm_mux.tdf ;
; muxlut.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/muxlut.inc ;
; bypassff.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/bypassff.inc ;
; altshift.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/altshift.inc ;
; altshift.tdf ; yes ; d:/altera/quartus42/libraries/megafunctions/altshift.tdf ;
; muxlut.tdf ; yes ; d:/altera/quartus42/libraries/megafunctions/muxlut.tdf ;
; lpm_decode.tdf ; yes ; d:/altera/quartus42/libraries/megafunctions/lpm_decode.tdf ;
; declut.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/declut.inc ;
; lpm_compare.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/lpm_compare.inc ;
; lpm_constant.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/lpm_constant.inc ;
; db/decode_ngb.tdf ; yes ; E:/otherpersondata/hk/Inter（629）/db/decode_ngb.tdf ;
; lpm_counter.tdf ; yes ; d:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf ;
; lpm_add_sub.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/lpm_add_sub.inc ;
; cmpconst.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/cmpconst.inc ;
; lpm_counter.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/lpm_counter.inc ;
; dffeea.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/dffeea.inc ;
; alt_synch_counter.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/alt_synch_counter.inc ;
; alt_synch_counter_f.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.inc ;
; alt_counter_stratix.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/alt_counter_stratix.inc ;
; lpm_add_sub.tdf ; yes ; d:/altera/quartus42/libraries/megafunctions/lpm_add_sub.tdf ;
; addcore.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/addcore.inc ;
; look_add.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/look_add.inc ;
; alt_stratix_add_sub.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/alt_stratix_add_sub.inc ;
; alt_mercury_add_sub.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/alt_mercury_add_sub.inc ;
; addcore.tdf ; yes ; d:/altera/quartus42/libraries/megafunctions/addcore.tdf ;
; a_csnbuffer.inc ; yes ; d:/altera/quartus42/libraries/megafunctions/a_csnbuffer.inc ;
; a_csnbuffer.tdf ; yes ; d:/altera/quartus42/libraries/megafunctions/a_csnbuffer.tdf ;
; look_add.tdf ; yes ; d:/altera/quartus42/libraries/megafunctions/look_add.tdf ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
+----------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+----------------------+-----------------------+
; Resource ; Usage ;
+----------------------+-----------------------+
; Logic cells ; 95 ;
; Total registers ; 46 ;
; I/O pins ; 76 ;
; Shareable expanders ; 2 ;
; Parallel expanders ; 3 ;
; Maximum fan-out node ; CLK_DIV:inst6|Key_CLK ;
; Maximum fan-out ; 37 ;
; Total fan-out ; 515 ;
; Average fan-out ; 2.98 ;
+----------------------+-----------------------+
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 4.2 Build 156 11/29/2004 SJ Web Edition
Info: Processing started: Tue May 09 22:33:26 2006
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off Inter -c Inter
Info: Found 1 design units, including 1 entities, in source file inter.bdf
Info: Found entity 1: inter
Info: Found 1 design units, including 0 entities, in source file types.vhd
Info: Found design unit 1: TYPES
Info: Found 2 design units, including 0 entities, in source file functions.vhd
Info: Found design unit 1: FUNCTIONS
Info: Found design unit 2: FUNCTIONS-body
Info: Found 2 design units, including 1 entities, in source file Send_CMD_7279A.vhd
Info: Found design unit 1: Send_CMD_7279A-Send_CMD_7279A_architecture
Info: Found entity 1: Send_CMD_7279A
Info: Found 2 design units, including 1 entities, in source file perictr.vhd
Info: Found design unit 1: perictr-perictr_architecture
Info: Found entity 1: perictr
Info: Found 2 design units, including 1 entities, in source file ReadKeyValBlock.vhd
Info: Found design unit 1: ReadKeyValBlock-ReadKeyValBlock_architecture
Info: Found entity 1: ReadKeyValBlock
Info: Found 2 design units, including 1 entities, in source file LCD_Display.vhd
Info: Found design unit 1: LCD_Display-LCD_Display_architecture
Info: Found entity 1: LCD_Display
Info: Found 2 design units, including 1 entities, in source file CLK_DIV.vhd
Info: Found design unit 1: CLK_DIV-CLK_DIV_architecture
Info: Found entity 1: CLK_DIV
Info: Found 2 design units, including 1 entities, in source file altdpram0.vhd
Info: Found design unit 1: altdpram0-SYN
Info: Found entity 1: altdpram0
Warning: Port "DSP_RW" of type LCD_Display and instance "inst5" is missing source signal
Warning: Port "A19" of type LCD_Display and instance "inst5" is missing source signal
Warning: Port "A20" of type LCD_Display and instance "inst5" is missing source signal
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/altdpram.tdf
Info: Found entity 1: altdpram
Info: Issued messages during elaboration of megafunction "altdpram0:inst|altdpram:altdpram_component"
Warning: Assertion warning: Current device family (MAX3000A) does not support dual-port asynchronous RAM -- implementing the asynchronous RAM as a latch array instead
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/lpm_mux.tdf
Info: Found entity 1: lpm_mux
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/altshift.tdf
Info: Found entity 1: altshift
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/muxlut.tdf
Info: Found entity 1: muxlut
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/lpm_decode.tdf
Info: Found entity 1: lpm_decode
Info: Found 1 design units, including 1 entities, in source file db/decode_ngb.tdf
Info: Found entity 1: decode_ngb
Info: Power-up level of register "LCD_Display:inst5|LCD_E" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "LCD_Display:inst5|LCD_E" with stuck data_in port to stuck value VCC
Info: Power-up level of register "ReadKeyValBlock:inst4|Wr" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "ReadKeyValBlock:inst4|Wr" with stuck data_in port to stuck value VCC
Warning: Reduced register "ReadKeyValBlock:inst4|Wr_Addr" with stuck data_in port to stuck value GND
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[1][7]" is permanently disabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[1][6]" is permanently disabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[1][5]" is permanently disabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[1][4]" is permanently disabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[1][3]" is permanently disabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[1][2]" is permanently disabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[1][1]" is permanently disabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[1][0]" is permanently disabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[0][7]" is permanently enabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[0][6]" is permanently enabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[0][5]" is permanently enabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[0][4]" is permanently enabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[0][3]" is permanently enabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[0][2]" is permanently enabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[0][1]" is permanently enabled
Warning: LATCH primitive "altdpram0:inst|altdpram:altdpram_component|cells[0][0]" is permanently enabled
Info: Inferred 2 megafunctions from design logic
Info: Inferred lpm_counter megafunction (LPM_WIDTH=5) from the following logic: "Send_CMD_7279A:inst3|Transmit_Cnt[0]~5"
Info: Inferred lpm_counter megafunction (LPM_WIDTH=8) from the following logic: "ReadKeyValBlock:inst4|Recieve_Cnt[0]~16"
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf
Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/lpm_add_sub.tdf
Info: Found entity 1: lpm_add_sub
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/addcore.tdf
Info: Found entity 1: addcore
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/a_csnbuffer.tdf
Info: Found entity 1: a_csnbuffer
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42/libraries/megafunctions/look_add.tdf
Info: Found entity 1: look_add
Info: Ignored 6 buffer(s)
Info: Ignored 6 SOFT buffer(s)
Warning: Converted TRI buffer or tri-state bus to logic, or removed OPNDRN
Warning: Converting TRI node "LCD_Display:inst5|Addr_Code[1]~0" that feeds logic to an OR gate
Warning: Reduced register "Send_CMD_7279A:inst3|Key_CS_Delay[2]" with stuck data_in port to stuck value GND
Warning: TRI or OPNDRN buffers permanently disabled
Warning: Node "perictr:inst1|FPS_EXINT"
Warning: Node "perictr:inst1|BIO"
Warning: Node "perictr:inst1|BDR2"
Warning: Node "LCD_Display:inst5|Addr_Code[0]"
Warning: Node "LCD_Display:inst5|LCD_RW"
Warning: Node "LCD_Display:inst5|Addr_Code[1]"
Warning: Node "perictr:inst1|BCLKR2"
Warning: Node "perictr:inst1|BFSR2"
Warning: Node "perictr:inst1|HD0"
Warning: Node "perictr:inst1|HD1"
Warning: Node "perictr:inst1|HD2"
Warning: Node "perictr:inst1|HD3"
Warning: Node "perictr:inst1|HD4"
Warning: Node "perictr:inst1|HD5"
Warning: Node "perictr:inst1|HD6"
Warning: TRI or OPNDRN buffers permanently enabled
Warning: Node "DATA_IO[7]~15"
Warning: Node "DATA_IO[6]~14"
Warning: Node "DATA_IO[5]~13"
Warning: Node "DATA_IO[4]~12"
Warning: Node "DATA_IO[3]~11"
Warning: Node "DATA_IO[2]~10"
Warning: Node "DATA_IO[1]~9"
Warning: Node "DATA_IO[0]~8"
Warning: Output pins are stuck at VCC or GND
Warning: Pin "RS" stuck at VCC
Warning: Pin "INT1" stuck at VCC
Warning: Pin "INT3" stuck at VCC
Warning: Pin "NMI" stuck at VCC
Warning: Pin "HOLD" stuck at VCC
Warning: Pin "FLASH_BYTE" stuck at VCC
Warning: Pin "LCD_E" stuck at VCC
Warning: Pin "LCD_CS2" stuck at GND
Info: Promoted pin-driven signal(s) to global signal
Info: Promoted clock signal driven by pin "CPLD_CLKIN" to global clock signal
Warning: Design contains 11 input pin(s) that do not drive logic
Warning: No output dependent on input pin "FPS_INTR"
Warning: No output dependent on input pin "XF"
Warning: No output dependent on input pin "DSP_DS"
Warning: No output dependent on input pin "DSP_PS"
Warning: No output dependent on input pin "IOSTRB"
Warning: No output dependent on input pin "BDX2"
Warning: No output dependent on input pin "CPLD_GCLRN"
Warning: No output dependent on input pin "CPLD_OE1"
Warning: No output dependent on input pin "BCLKX2"
Warning: No output dependent on input pin "BFSX2"
Warning: No output dependent on input pin "CPLD_TOUT"
Info: Implemented 173 device resources after synthesis - the final resource count might be different
Info: Implemented 27 input pins
Info: Implemented 40 output pins
Info: Implemented 9 bidirectional pins
Info: Implemented 95 macrocells
Info: Implemented 2 shareable expanders
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 72 warnings
Info: Processing ended: Tue May 09 22:33:35 2006
Info: Elapsed time: 00:00:10
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