inter_modelsim.xrf

cpld

vendor_name = ModelSim
source_file = 1, E:/otherpersondata/hk/Inter（629）/inter.bdf
source_file = 1, E:/otherpersondata/hk/Inter（629）/types.vhd
source_file = 1, E:/otherpersondata/hk/Inter（629）/functions.vhd
source_file = 1, E:/otherpersondata/hk/Inter（629）/Send_CMD_7279A.vhd
source_file = 1, E:/otherpersondata/hk/Inter（629）/Inter.vwf
source_file = 1, E:/otherpersondata/hk/Inter（629）/perictr.vhd
source_file = 1, E:/otherpersondata/hk/Inter（629）/ReadKeyValBlock.vhd
source_file = 1, E:/otherpersondata/hk/Inter（629）/LCD_Display.vhd
source_file = 1, E:/otherpersondata/hk/Inter（629）/Inter.cdf
source_file = 1, E:/otherpersondata/hk/Inter（629）/CLK_DIV.vhd
source_file = 1, E:/otherpersondata/hk/Inter（629）/altdpram0.vhd
source_file = 1, d:/altera/quartus42/libraries/megafunctions/altdpram.tdf
source_file = 1, d:/altera/quartus42/libraries/others/maxplus2/memmodes.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_decode.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_mux.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/a_hdffe.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/a_rdenreg.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/altqpram.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/alt_le_rden_reg.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/altsyncram.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/aglobal42.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_mux.tdf
source_file = 1, d:/altera/quartus42/libraries/megafunctions/muxlut.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/bypassff.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/altshift.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/cbx.lst
source_file = 1, d:/altera/quartus42/libraries/megafunctions/altshift.tdf
source_file = 1, d:/altera/quartus42/libraries/megafunctions/muxlut.tdf
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_decode.tdf
source_file = 1, d:/altera/quartus42/libraries/megafunctions/declut.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_compare.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_constant.inc
source_file = 1, E:/otherpersondata/hk/Inter（629）/db/decode_ngb.tdf
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_add_sub.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/cmpconst.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_counter.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/dffeea.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/alt_synch_counter.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/alt_synch_counter_f.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/alt_counter_stratix.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/lpm_add_sub.tdf
source_file = 1, d:/altera/quartus42/libraries/megafunctions/addcore.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/look_add.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/alt_stratix_add_sub.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/alt_mercury_add_sub.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/addcore.tdf
source_file = 1, d:/altera/quartus42/libraries/megafunctions/a_csnbuffer.inc
source_file = 1, d:/altera/quartus42/libraries/megafunctions/a_csnbuffer.tdf
source_file = 1, d:/altera/quartus42/libraries/megafunctions/look_add.tdf
design_name = inter
instance = comp, CPLD_CLKIN_aI, CPLD_CLKIN, inter, 1
instance = comp, Key_SDAT_aI, Key_SDAT, inter, 1
instance = comp, a_aVCC_a0_aI, ~VCC~0, inter, 1
instance = comp, a_aVCC_a1_aI, ~VCC~1, inter, 1
instance = comp, a_aVCC_a2_aI, ~VCC~2, inter, 1
instance = comp, a_aVCC_a3_aI, ~VCC~3, inter, 1
instance = comp, a_aVCC_a4_aI, ~VCC~4, inter, 1
instance = comp, A15_aI, A15, inter, 1
instance = comp, A15_a2_I, A15~2, inter, 1
instance = comp, A16_aI, A16, inter, 1
instance = comp, A16_a2_I, A16~2, inter, 1
instance = comp, A17_aI, A17, inter, 1
instance = comp, A17_a2_I, A17~2, inter, 1
instance = comp, a_aVCC_a5_aI, ~VCC~5, inter, 1
instance = comp, A18_aI, A18, inter, 1
instance = comp, DSP_MSTRB_aI, DSP_MSTRB, inter, 1
instance = comp, A20_aI, A20, inter, 1
instance = comp, A19_aI, A19, inter, 1
instance = comp, inst1_aCSROM_a12_I, inst1|CSROM~12, inter, 1
instance = comp, DSP_RW_aI, DSP_RW, inter, 1
instance = comp, DSP_RW_a8_I, DSP_RW~8, inter, 1
instance = comp, DSP_RW_a10_I, DSP_RW~10, inter, 1
instance = comp, PB_RS_aI, PB_RS, inter, 1
instance = comp, PB_RS_a2_I, PB_RS~2, inter, 1
instance = comp, A0_aI, A0, inter, 1
instance = comp, A0_a2_I, A0~2, inter, 1
instance = comp, DSP_IS_aI, DSP_IS, inter, 1
instance = comp, DSP_IS_a2_I, DSP_IS~2, inter, 1
instance = comp, DSP_RW_a13_I, DSP_RW~13, inter, 1
instance = comp, DSP_RW_a16_I, DSP_RW~16, inter, 1
instance = comp, a_aVCC_a6_aI, ~VCC~6, inter, 1
instance = comp, inst1_aCSRAM_a5_I, inst1|CSRAM~5, inter, 1
instance = comp, a_aVCC_a7_aI, ~VCC~7, inter, 1
instance = comp, FLASH_RY_aI, FLASH_RY, inter, 1
instance = comp, FPS_WAIT_aI, FPS_WAIT, inter, 1
instance = comp, inst1_aDSP_READY_a1_I, inst1|DSP_READY~1, inter, 1
instance = comp, a_aVCC_a8_aI, ~VCC~8, inter, 1
instance = comp, Key_aI, Key, inter, 1
instance = comp, inst6_a_aMake_CLK_aCNT1_a0_a_aI, inst6|\Make_CLK:CNT1[0], inter, 1
instance = comp, inst6_a_aMake_CLK_aCNT1_a1_a_aI, inst6|\Make_CLK:CNT1[1], inter, 1
instance = comp, inst6_a_aMake_CLK_aCNT1_a2_a_aI, inst6|\Make_CLK:CNT1[2], inter, 1
instance = comp, inst6_a_aMake_CLK_aCNT1_a3_a_aI, inst6|\Make_CLK:CNT1[3], inter, 1
instance = comp, inst6_a_aMake_CLK_aCNT1_a4_a_aI, inst6|\Make_CLK:CNT1[4], inter, 1
instance = comp, inst6_a_aMake_CLK_aCNT1_a5_a_aI, inst6|\Make_CLK:CNT1[5], inter, 1
instance = comp, inst6_a_aMake_CLK_aCNT1_a6_a_aI, inst6|\Make_CLK:CNT1[6], inter, 1
instance = comp, inst6_a_aMake_CLK_aCNT1_a8_a_aI, inst6|\Make_CLK:CNT1[8], inter, 1
instance = comp, inst6_a_aMake_CLK_aCNT1_a7_a_aI, inst6|\Make_CLK:CNT1[7], inter, 1
instance = comp, inst6_aKey_CLK_aI, inst6|Key_CLK, inter, 1
instance = comp, Key_RESET_aI, Key_RESET, inter, 1
instance = comp, inst3_aadd_a146_I, inst3|add~146, inter, 1
instance = comp, inst3_aKey_CS_Delay_a0_a_aI, inst3|Key_CS_Delay[0], inter, 1
instance = comp, inst3_aKey_CS_Delay_a1_a_aI, inst3|Key_CS_Delay[1], inter, 1
instance = comp, inst3_aTransmit_Cnt_rtl_0_adffs_a0_a_aI, inst3|Transmit_Cnt_rtl_0|dffs[0], inter, 1
instance = comp, inst3_aTransmit_Cnt_rtl_0_adffs_a2_a_aI, inst3|Transmit_Cnt_rtl_0|dffs[2], inter, 1
instance = comp, inst3_aTransmit_Cnt_rtl_0_adffs_a4_a_aI, inst3|Transmit_Cnt_rtl_0|dffs[4], inter, 1
instance = comp, inst3_aTransmit_Cnt_rtl_0_a_a203_I, inst3|Transmit_Cnt_rtl_0|_~203, inter, 1
instance = comp, inst3_aTransmit_Cnt_rtl_0_adffs_a1_a_aI, inst3|Transmit_Cnt_rtl_0|dffs[1], inter, 1
instance = comp, inst3_aTransmit_Cnt_rtl_0_adffs_a3_a_aI, inst3|Transmit_Cnt_rtl_0|dffs[3], inter, 1
instance = comp, inst3_aCLKOUT_a36_I, inst3|CLKOUT~36, inter, 1
instance = comp, inst3_aRead_En_aI, inst3|Read_En, inter, 1
instance = comp, inst4_aRecieve_Cnt_rtl_1_adffs_a0_a_aI, inst4|Recieve_Cnt_rtl_1|dffs[0], inter, 1
instance = comp, inst4_aRecieve_Cnt_rtl_1_adffs_a1_a_aI, inst4|Recieve_Cnt_rtl_1|dffs[1], inter, 1
instance = comp, inst4_aRecieve_Cnt_rtl_1_adffs_a2_a_aI, inst4|Recieve_Cnt_rtl_1|dffs[2], inter, 1
instance = comp, inst4_aRecieve_Cnt_rtl_1_adffs_a3_a_aI, inst4|Recieve_Cnt_rtl_1|dffs[3], inter, 1
instance = comp, inst4_aRecieve_Cnt_rtl_1_adffs_a4_a_aI, inst4|Recieve_Cnt_rtl_1|dffs[4], inter, 1
instance = comp, inst4_aRecieve_Cnt_rtl_1_adffs_a5_a_aI, inst4|Recieve_Cnt_rtl_1|dffs[5], inter, 1
instance = comp, inst4_aRecieve_Cnt_rtl_1_adffs_a6_a_aI, inst4|Recieve_Cnt_rtl_1|dffs[6], inter, 1
instance = comp, inst4_aRecieve_Cnt_rtl_1_adffs_a7_a_aI, inst4|Recieve_Cnt_rtl_1|dffs[7], inter, 1
instance = comp, inst4_aDSP_Write_INT_aI, inst4|DSP_Write_INT, inter, 1
instance = comp, inst3_aKey_CS_a15_I, inst3|Key_CS~15, inter, 1
instance = comp, A18_a16_I, A18~16, inter, 1
instance = comp, a_aVCC_a9_aI, ~VCC~9, inter, 1
instance = comp, a_aVCC_a10_aI, ~VCC~10, inter, 1
instance = comp, a_aVCC_a11_aI, ~VCC~11, inter, 1
instance = comp, a_aGND_a0_aI, ~GND~0, inter, 1
instance = comp, a_aVCC_a12_aI, ~VCC~12, inter, 1
instance = comp, a_aVCC_a13_aI, ~VCC~13, inter, 1
instance = comp, a_aVCC_a14_aI, ~VCC~14, inter, 1
instance = comp, a_aVCC_a15_aI, ~VCC~15, inter, 1
instance = comp, a_aVCC_a16_aI, ~VCC~16, inter, 1
instance = comp, a_aVCC_a17_aI, ~VCC~17, inter, 1
instance = comp, a_aVCC_a18_aI, ~VCC~18, inter, 1
instance = comp, a_aVCC_a19_aI, ~VCC~19, inter, 1
instance = comp, a_aVCC_a20_aI, ~VCC~20, inter, 1
instance = comp, inst3_aKey_CLKOUT_a471_I, inst3|Key_CLKOUT~471, inter, 1
instance = comp, inst3_aKey_CLKOUT_a468_I, inst3|Key_CLKOUT~468, inter, 1
instance = comp, inst3_aCLKOUT_a39_I, inst3|CLKOUT~39, inter, 1
instance = comp, inst3_aoKey_SDAT_areg0_I, inst3|oKey_SDAT~reg0, inter, 1
instance = comp, inst3_aSend_ReadCMDTO7279A_a1_I, inst3|Send_ReadCMDTO7279A~1, inter, 1
instance = comp, inst4_aINPUT_Register_a0_a_aI, inst4|INPUT_Register[0], inter, 1
instance = comp, inst4_aINPUT_Register_a1_a_aI, inst4|INPUT_Register[1], inter, 1
instance = comp, inst4_aINPUT_Register_a2_a_aI, inst4|INPUT_Register[2], inter, 1
instance = comp, inst4_aINPUT_Register_a3_a_aI, inst4|INPUT_Register[3], inter, 1
instance = comp, inst4_aINPUT_Register_a4_a_aI, inst4|INPUT_Register[4], inter, 1
instance = comp, inst4_aINPUT_Register_a5_a_aI, inst4|INPUT_Register[5], inter, 1
instance = comp, inst4_aINPUT_Register_a6_a_aI, inst4|INPUT_Register[6], inter, 1
instance = comp, inst4_aINPUT_Register_a7_a_aI, inst4|INPUT_Register[7], inter, 1
instance = comp, inst4_aRead_Done_aI, inst4|Read_Done, inter, 1
instance = comp, inst4_aKey_Data_a7_a_aI, inst4|Key_Data[7], inter, 1
instance = comp, inst7_a17sexp_I, inst7~17sexp, inter, 1
instance = comp, inst_aaltdpram_component_axql_a7_a_a66_I, inst|altdpram_component|xql[7]~66, inter, 1
instance = comp, inst4_aKey_Data_a6_a_aI, inst4|Key_Data[6], inter, 1
instance = comp, inst_aaltdpram_component_axql_a6_a_a70_I, inst|altdpram_component|xql[6]~70, inter, 1
instance = comp, inst7_a41_I, inst7~41, inter, 1
instance = comp, inst4_aKey_Data_a5_a_aI, inst4|Key_Data[5], inter, 1
instance = comp, inst_aaltdpram_component_axql_a5_a_a74_I, inst|altdpram_component|xql[5]~74, inter, 1
instance = comp, inst4_aKey_Data_a4_a_aI, inst4|Key_Data[4], inter, 1
instance = comp, inst_aaltdpram_component_axql_a4_a_a78_I, inst|altdpram_component|xql[4]~78, inter, 1
instance = comp, inst4_aKey_Data_a3_a_aI, inst4|Key_Data[3], inter, 1
instance = comp, inst_aaltdpram_component_axql_a3_a_a82_I, inst|altdpram_component|xql[3]~82, inter, 1
instance = comp, inst7_a42_I, inst7~42, inter, 1
instance = comp, inst4_aKey_Data_a2_a_aI, inst4|Key_Data[2], inter, 1
instance = comp, inst_aaltdpram_component_axql_a2_a_a86_I, inst|altdpram_component|xql[2]~86, inter, 1
instance = comp, inst4_aKey_Data_a1_a_aI, inst4|Key_Data[1], inter, 1
instance = comp, inst_aaltdpram_component_axql_a1_a_a90_I, inst|altdpram_component|xql[1]~90, inter, 1
instance = comp, inst4_aKey_Data_a0_a_aI, inst4|Key_Data[0], inter, 1
instance = comp, inst_aaltdpram_component_axql_a0_a_a94_I, inst|altdpram_component|xql[0]~94, inter, 1
instance = comp, RS_aI, RS, inter, 1
instance = comp, FPS_INTR_aI, FPS_INTR, inter, 1
instance = comp, XF_aI, XF, inter, 1
instance = comp, DSP_DS_aI, DSP_DS, inter, 1
instance = comp, DSP_PS_aI, DSP_PS, inter, 1
instance = comp, IOSTRB_aI, IOSTRB, inter, 1
instance = comp, BDX2_aI, BDX2, inter, 1
instance = comp, CPLD_GCLRN_aI, CPLD_GCLRN, inter, 1
instance = comp, CPLD_OE1_aI, CPLD_OE1, inter, 1
instance = comp, BCLKX2_aI, BCLKX2, inter, 1
instance = comp, BFSX2_aI, BFSX2, inter, 1
instance = comp, CPLD_TOUT_aI, CPLD_TOUT, inter, 1
instance = comp, INT1_aI, INT1, inter, 1
instance = comp, INT3_aI, INT3, inter, 1
instance = comp, NMI_aI, NMI, inter, 1
instance = comp, HOLD_aI, HOLD, inter, 1
instance = comp, FLASH_A15_aI, FLASH_A15, inter, 1
instance = comp, FLASH_A16_aI, FLASH_A16, inter, 1
instance = comp, FLASH_A17_aI, FLASH_A17, inter, 1
instance = comp, FLASH_BYTE_aI, FLASH_BYTE, inter, 1
instance = comp, CSROM_aI, CSROM, inter, 1
instance = comp, FLASH_WR_aI, FLASH_WR, inter, 1
instance = comp, FLASH_RD_aI, FLASH_RD, inter, 1
instance = comp, FLASH_RS_aI, FLASH_RS, inter, 1
instance = comp, FPS_A0_aI, FPS_A0, inter, 1
instance = comp, CS_FPS_aI, CS_FPS, inter, 1
instance = comp, FPS_RD_aI, FPS_RD, inter, 1
instance = comp, FPS_WR_aI, FPS_WR, inter, 1
instance = comp, FPS_EXINT_aI, FPS_EXINT, inter, 1
instance = comp, CSRAM_aI, CSRAM, inter, 1
instance = comp, BIO_aI, BIO, inter, 1
instance = comp, DSP_READY_aI, DSP_READY, inter, 1
instance = comp, BDR2_aI, BDR2, inter, 1
instance = comp, DSP_Write_INT2_aI, DSP_Write_INT2, inter, 1
instance = comp, Key_CS_aI, Key_CS, inter, 1
instance = comp, LCD_RS_aI, LCD_RS, inter, 1
instance = comp, LCD_RW_aI, LCD_RW, inter, 1
instance = comp, LCD_E_aI, LCD_E, inter, 1
instance = comp, LCD_CS1_aI, LCD_CS1, inter, 1
instance = comp, LCD_CS2_aI, LCD_CS2, inter, 1
instance = comp, BCLKR2_aI, BCLKR2, inter, 1
instance = comp, BFSR2_aI, BFSR2, inter, 1
instance = comp, HD0_aI, HD0, inter, 1
instance = comp, HD1_aI, HD1, inter, 1
instance = comp, HD2_aI, HD2, inter, 1
instance = comp, HD3_aI, HD3, inter, 1
instance = comp, HD4_aI, HD4, inter, 1
instance = comp, HD5_aI, HD5, inter, 1
instance = comp, HD6_aI, HD6, inter, 1
instance = comp, HD7_aI, HD7, inter, 1
instance = comp, Key_CLKOUT_aI, Key_CLKOUT, inter, 1
instance = comp, DATA_IO_a7_a_aI, DATA_IO[7], inter, 1
instance = comp, DATA_IO_a6_a_aI, DATA_IO[6], inter, 1
instance = comp, DATA_IO_a5_a_aI, DATA_IO[5], inter, 1
instance = comp, DATA_IO_a4_a_aI, DATA_IO[4], inter, 1
instance = comp, DATA_IO_a3_a_aI, DATA_IO[3], inter, 1
instance = comp, DATA_IO_a2_a_aI, DATA_IO[2], inter, 1
instance = comp, DATA_IO_a1_a_aI, DATA_IO[1], inter, 1
instance = comp, DATA_IO_a0_a_aI, DATA_IO[0], inter, 1