inter.vho

cpld

SIGNAL A15_a2_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A15_a2_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A15_a2_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A15_a2_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A15_a2_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A16_a2_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A17_a2_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSROM_a12_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a8_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a10_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL PB_RS_a2_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A0_a2_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_IS_a2_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a13_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DSP_RW_a16_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aCSRAM_a5_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst1_aDSP_READY_a1_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CS_a15_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL A18_a16_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst3_aKey_CLKOUT_a468_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst4_aDSP_Write_INT_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst6_aKey_CLK_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst6_aKey_CLK_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst6_aKey_CLK_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst6_aKey_CLK_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst6_aKey_CLK_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst6_aKey_CLK_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL inst6_aKey_CLK_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);