inter.tan.summary

cpld

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 0.900 ns
From           : Key_RESET
To             : Send_CMD_7279A:inst3|Key_CS_Delay[0]
From Clock     : 
To Clock       : CPLD_CLKIN
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 29.600 ns
From           : Send_CMD_7279A:inst3|Send_ReadCMDTO7279A~1
To             : Key_SDAT
From Clock     : CPLD_CLKIN
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 14.200 ns
From           : DSP_RW
To             : DATA_IO[7]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 4.300 ns
From           : Key_SDAT
To             : ReadKeyValBlock:inst4|INPUT_Register[0]
From Clock     : 
To Clock       : CPLD_CLKIN
Failed Paths   : 0

Type           : Clock Setup: 'CPLD_CLKIN'
Slack          : N/A
Required Time  : None
Actual Time    : 24.15 MHz ( period = 41.400 ns )
From           : Send_CMD_7279A:inst3|Read_En
To             : ReadKeyValBlock:inst4|lpm_counter:Recieve_Cnt_rtl_1|dffs[3]
From Clock     : CPLD_CLKIN
To Clock       : CPLD_CLKIN
Failed Paths   : 0

Type           : Clock Hold: 'CPLD_CLKIN'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : Send_CMD_7279A:inst3|lpm_counter:Transmit_Cnt_rtl_0|dffs[2]
To             : Send_CMD_7279A:inst3|Send_ReadCMDTO7279A~1
From Clock     : CPLD_CLKIN
To Clock       : CPLD_CLKIN
Failed Paths   : 39

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 39

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