main.dbg

飞思卡尔 新型的单片机rs08的ADC调试程序

mKBIES_KBEDG0:      equ    %00000001
mKBIES_KBEDG1:      equ    %00000010
mKBIES_KBEDG2:      equ    %00000100
mKBIES_KBEDG4:      equ    %00010000
mKBIES_KBEDG5:      equ    %00100000


;*** PAGESEL - Page Register; 0x0000001F ***
PAGESEL:            equ    $0000001F                                ;*** PAGESEL - Page Register; 0x0000001F ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PAGESEL_AD6:        equ    0                                         ; Page Selector Bit 6
PAGESEL_AD7:        equ    1                                         ; Page Selector Bit 7
PAGESEL_AD8:        equ    2                                         ; Page Selector Bit 8
PAGESEL_AD9:        equ    3                                         ; Page Selector Bit 9
PAGESEL_AD10:       equ    4                                         ; Page Selector Bit 10
PAGESEL_AD11:       equ    5                                         ; Page Selector Bit 11
PAGESEL_AD12:       equ    6                                         ; Page Selector Bit 12
PAGESEL_AD13:       equ    7                                         ; Page Selector Bit 13
; bit position masks
mPAGESEL_AD6:       equ    %00000001
mPAGESEL_AD7:       equ    %00000010
mPAGESEL_AD8:       equ    %00000100
mPAGESEL_AD9:       equ    %00001000
mPAGESEL_AD10:      equ    %00010000
mPAGESEL_AD11:      equ    %00100000
mPAGESEL_AD12:      equ    %01000000
mPAGESEL_AD13:      equ    %10000000


;*** SRS - System Reset Status Register; 0x00000200 ***
SRS:                equ    $00000200                                ;*** SRS - System Reset Status Register; 0x00000200 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
SRS_LVD:            equ    1                                         ; Low Voltage Detect
SRS_ILAD:           equ    3                                         ; Illegal Address
SRS_ILOP:           equ    4                                         ; Illegal Opcode
SRS_COP:            equ    5                                         ; Computer Operating Properly (COP) Watchdog
SRS_PIN:            equ    6                                         ; External Reset Pin
SRS_POR:            equ    7                                         ; Power-On Reset
; bit position masks
mSRS_LVD:           equ    %00000010
mSRS_ILAD:          equ    %00001000
mSRS_ILOP:          equ    %00010000
mSRS_COP:           equ    %00100000
mSRS_PIN:           equ    %01000000
mSRS_POR:           equ    %10000000


;*** SOPT - System Options Register; 0x00000201 ***
SOPT:               equ    $00000201                                ;*** SOPT - System Options Register; 0x00000201 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
SOPT_RSTPE:         equ    0                                         ; RESET Pin Enable
SOPT_BKGDPE:        equ    1                                         ; Background Debug Mode Pin Enable
SOPT_STOPE:         equ    5                                         ; Stop Mode Enable
SOPT_COPT:          equ    6                                         ; COP Watchdog Timeout
SOPT_COPE:          equ    7                                         ; COP Watchdog Enable
; bit position masks
mSOPT_RSTPE:        equ    %00000001
mSOPT_BKGDPE:       equ    %00000010
mSOPT_STOPE:        equ    %00100000
mSOPT_COPT:         equ    %01000000
mSOPT_COPE:         equ    %10000000


;*** SIP1 - System Interrupt Pending Register; 0x00000202 ***
SIP1:               equ    $00000202                                ;*** SIP1 - System Interrupt Pending Register; 0x00000202 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
SIP1_LVD:           equ    0                                         ; Low-Voltage Detect Interrupt Pending
SIP1_RTI:           equ    1                                         ; Real-Time Interrupt Pending
SIP1_MTIM:          equ    2                                         ; Modulo Timer Interrupt Pending
SIP1_ACMP:          equ    3                                         ; Analog Comparator Interrupt Pending
SIP1_KBI:           equ    4                                         ; Keyboard Interrupt Pending
; bit position masks
mSIP1_LVD:          equ    %00000001
mSIP1_RTI:          equ    %00000010
mSIP1_MTIM:         equ    %00000100
mSIP1_ACMP:         equ    %00001000
mSIP1_KBI:          equ    %00010000


;*** SDIDH - System Device Identification Register High; 0x00000206 ***
SDIDH:              equ    $00000206                                ;*** SDIDH - System Device Identification Register High; 0x00000206 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
SDIDH_ID8:          equ    0                                         ; Part Identification Number 8
SDIDH_ID9:          equ    1                                         ; Part Identification Number 9
SDIDH_ID10:         equ    2                                         ; Part Identification Number 10
SDIDH_ID11:         equ    3                                         ; Part Identification Number 11
SDIDH_REV0:         equ    4                                         ; Revision Number 0
SDIDH_REV1:         equ    5                                         ; Revision Number 1
SDIDH_REV2:         equ    6                                         ; Revision Number 2
SDIDH_REV3:         equ    7                                         ; Revision Number 3
; bit position masks
mSDIDH_ID8:         equ    %00000001
mSDIDH_ID9:         equ    %00000010
mSDIDH_ID10:        equ    %00000100
mSDIDH_ID11:        equ    %00001000
mSDIDH_REV0:        equ    %00010000
mSDIDH_REV1:        equ    %00100000
mSDIDH_REV2:        equ    %01000000
mSDIDH_REV3:        equ    %10000000


;*** SDIDL - System Device Identification Register Low; 0x00000207 ***
SDIDL:              equ    $00000207                                ;*** SDIDL - System Device Identification Register Low; 0x00000207 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
SDIDL_ID0:          equ    0                                         ; Part Identification Number 0
SDIDL_ID1:          equ    1                                         ; Part Identification Number 1
SDIDL_ID2:          equ    2                                         ; Part Identification Number 2
SDIDL_ID3:          equ    3                                         ; Part Identification Number 3
SDIDL_ID4:          equ    4                                         ; Part Identification Number 4
SDIDL_ID5:          equ    5                                         ; Part Identification Number 5
SDIDL_ID6:          equ    6                                         ; Part Identification Number 6
SDIDL_ID7:          equ    7                                         ; Part Identification Number 7
; bit position masks
mSDIDL_ID0:         equ    %00000001
mSDIDL_ID1:         equ    %00000010
mSDIDL_ID2:         equ    %00000100
mSDIDL_ID3:         equ    %00001000
mSDIDL_ID4:         equ    %00010000
mSDIDL_ID5:         equ    %00100000
mSDIDL_ID6:         equ    %01000000
mSDIDL_ID7:         equ    %10000000


;*** SRTISC - System RTI Status and Control Register; 0x00000208 ***
SRTISC:             equ    $00000208                                ;*** SRTISC - System RTI Status and Control Register; 0x00000208 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
SRTISC_RTIS0:       equ    0                                         ; Real-Time Interrupt Delay Select Bit 0
SRTISC_RTIS1:       equ    1                                         ; Real-Time Interrupt Delay Select Bit 1
SRTISC_RTIS2:       equ    2                                         ; Real-Time Interrupt Delay Select Bit 2
SRTISC_RTIE:        equ    4                                         ; Real-Time Interrupt Enable
SRTISC_RTICLKS:     equ    5                                         ; Real-Time Interrupt Clock Select
SRTISC_RTIACK:      equ    6                                         ; Real-Time Interrupt Acknowledge
SRTISC_RTIF:        equ    7                                         ; Real-Time Interrupt Flag
; bit position masks
mSRTISC_RTIS0:      equ    %00000001
mSRTISC_RTIS1:      equ    %00000010
mSRTISC_RTIS2:      equ    %00000100
mSRTISC_RTIE:       equ    %00010000
mSRTISC_RTICLKS:    equ    %00100000
mSRTISC_RTIACK:     equ    %01000000
mSRTISC_RTIF:       equ    %10000000


;*** SPMSC1 - System Power Management Status and Control 1 Register; 0x00000209 ***
SPMSC1:             equ    $00000209                                ;*** SPMSC1 - System Power Management Status and Control 1 Register; 0x00000209 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
SPMSC1_BGBE:        equ    0                                         ; Bandgap Buffer Enable
SPMSC1_LVDE:        equ    2                                         ; Low-Voltage Detect Enable
SPMSC1_LVDSE:       equ    3                                         ; Low-Voltage Detect Stop Enable
SPMSC1_LVDRE:       equ    4                                         ; Low-Voltage Detect Reset Enable
SPMSC1_LVDIE:       equ    5                                         ; Low-Voltage Detect Interrrupt Enable
SPMSC1_LVDACK:      equ    6                                         ; Low-Voltage Detect Acknowledge
SPMSC1_LVDF:        equ    7                                         ; Low-Voltage Detect Flag
; bit position masks
mSPMSC1_BGBE:       equ    %00000001
mSPMSC1_LVDE:       equ    %00000100
mSPMSC1_LVDSE:      equ    %00001000
mSPMSC1_LVDRE:      equ    %00010000
mSPMSC1_LVDIE:      equ    %00100000
mSPMSC1_LVDACK:     equ    %01000000
mSPMSC1_LVDF:       equ    %10000000


;*** FOPT - FLASH Options Register; 0x00000210 ***
FOPT:               equ    $00000210                                ;*** FOPT - FLASH Options Register; 0x00000210 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
FOPT_SECD:          equ    0                                         ; Security State Code
; bit position masks
mFOPT_SECD:         equ    %00000001


;*** FLCR - FLASH Control Register; 0x00000211 ***
FLCR:               equ    $00000211                                ;*** FLCR - FLASH Control Register; 0x00000211 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
FLCR_PGM:           equ    0                                         ; Program Control Bit
FLCR_MASS:          equ    2                                         ; Mass Erase Control Bit
FLCR_HVEN:          equ    3                                         ; High Voltage Enable
; bit position masks
mFLCR_PGM:          equ    %00000001
mFLCR_MASS:         equ    %00000100
mFLCR_HVEN:         equ    %00001000


;*** PTAPE - Internal Pulling Device Enable for Port A Register; 0x00000220 ***
PTAPE:              equ    $00000220                                ;*** PTAPE - Internal Pulling Device Enable for Port A Register; 0x00000220 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PTAPE_PTAPE0:       equ    0                                         ; Internal Pulling Device Enable for Port A Bit 0
PTAPE_PTAPE1:       equ    1                                         ; Internal Pulling Device Enable for Port A Bit 1
PTAPE_PTAPE2:       equ    2                                         ; Internal Pulling Device Enable for Port A Bit 2
PTAPE_PTAPE4:       equ    4                                         ; Internal Pulling Device Enable for Port A Bit 4
PTAPE_PTAPE5:       equ    5                                         ; Internal Pulling Device Enable for Port A Bit 5
; bit position masks
mPTAPE_PTAPE0:      equ    %00000001
mPTAPE_PTAPE1:      equ    %00000010
mPTAPE_PTAPE2:      equ    %00000100
mPTAPE_PTAPE4:      equ    %00010000
mPTAPE_PTAPE5:      equ    %00100000


;*** PTAPUD - Pullup/Pulldown Device Control for Port A; 0x00000221 ***
PTAPUD:             equ    $00000221                                ;*** PTAPUD - Pullup/Pulldown Device Control for Port A; 0x00000221 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PTAPUD_PTAPUD0:     equ    0                                         ; Pullup/Pulldown Device Control for Port A Bit 0
PTAPUD_PTAPUD1:     equ    1                                         ; Pullup/Pulldown Device Control for Port A Bit 1
PTAPUD_PTAPUD2:     equ    2                                         ; Pullup/Pulldown Device Control for Port A Bit 2
PTAPUD_PTAPUD4:     equ    4                                         ; Pullup/Pulldown Device Control for Port A Bit 4
PTAPUD_PTAPUD5:     equ    5                                         ; Pullup/Pulldown Device Control for Port A Bit 5
; bit position masks
mPTAPUD_PTAPUD0:    equ    %00000001
mPTAPUD_PTAPUD1:    equ    %00000010
mPTAPUD_PTAPUD2:    equ    %00000100
mPTAPUD_PTAPUD4:    equ    %00010000
mPTAPUD_PTAPUD5:    equ    %00100000


;*** PTASE - Slew Rate Enable for Port A Register; 0x00000222 ***
PTASE:              equ    $00000222                                ;*** PTASE - Slew Rate Enable for Port A Register; 0x00000222 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PTASE_PTASE0:       equ    0                                         ; Output Slew Rate Enable for Port A Bit 0
PTASE_PTASE1:       equ    1                                         ; Output Slew Rate Enable for Port A Bit 1
PTASE_PTASE3:       equ    3                                         ; Output Slew Rate Enable for Port A Bit 3
PTASE_PTASE4:       equ    4                                         ; Output Slew Rate Enable for Port A Bit 4
PTASE_PTASE5:       equ    5                                         ; Output Slew Rate Enable for Port A Bit 5
; bit position masks
mPTASE_PTASE0:      equ    %00000001
mPTASE_PTASE1:      equ    %00000010
mPTASE_PTASE3:      equ    %00001000