lcnt8.vhd
来自「EDA技术应用.用QUARTUES II 实现EDA技术实验操作,类似于精典的M」· VHDL 代码 · 共 27 行
VHD
27 行
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY LCNT8 IS
PORT(CLK, LD: IN STD_LOGIC;
D: IN INTEGER RANGE 0 TO 255;
CAO: OUT STD_LOGIC);
END ENTITY LCNT8;
ARCHITECTURE ART OF LCNT8 IS
SIGNAL COUNT: INTEGER RANGE 0 TO 255;
BEGIN
PROCESS(CLK)IS
BEGIN
IF CLK'EVENT AND CLK='1' THEN
IF LD='1' THEN COUNT<=D;
ELSE COUNT<=COUNT+1;
END IF;
END IF;
END PROCESS;
PROCESS(CLK,COUNT) IS
BEGIN
IF CLK'EVENT AND CLK='1' THEN
IF COUNT=255 THEN CAO<='1';
ELSE CAO<='0';
END IF;
END IF;
END PROCESS;
END ARCHITECTURE ART;
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