⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 refresh_cntrl.v

📁 开发环境ise6+
💻 V
字号:
/******************************************************************************
**
**  Xilinx, Inc. 2002                 www.xilinx.com
**
**  XAPP 266 - Synthesizable FCRAM Controller
**
*******************************************************************************
**
**  File name :       refresh_cntrl.v
**
**  Description :     Refresh controller
**                    Latches in u_ref_parms and u_ref_enable during the 
**                    startup and reset. Upon power up / initialization, it
**                    generates the required reset logic. Once completed, 
**                    it maintains an interval refresh counter 
**                    (ref_interval_cnt = how often a refresh should occur) 
**                    as well as a refresh burst counter 
**                    (ref_burst_cnt = how many consecutive refreshes occur)
**                
**                    The automatic refresh counter is enabled by setting 
**                    u_ref_enable=1. 
**                    The refresh counter parameters are initialized during a 
**                    system reset, when the controller enters the MRS 
**                    initialization sequence. At this time, the interval 
**                    counter begins counting immediately. 
**
**  Date - revision : 01/15/2002 - v 1.0
**
**  Author :          CLF
**
**  Contact : e-mail  hotline@xilinx.com
**            phone   + 1 800 255 7778 
**
**  Disclaimer: LIMITED WARRANTY AND DISCLAMER. These designs are 
**              provided to you "as is". Xilinx and its licensors make and you 
**              receive no warranties or conditions, express, implied, 
**              statutory or otherwise, and Xilinx specifically disclaims any 
**              implied warranties of merchantability, non-infringement, or 
**              fitness for a particular purpose. Xilinx does not warrant that 
**              the functions contained in these designs will meet your 
**              requirements, or that the operation of these designs will be 
**              uninterrupted or error free, or that defects in the Designs 
**              will be corrected. Furthermore, Xilinx does not warrant or 
**              make any representations regarding use or the results of the 
**              use of the designs in terms of correctness, accuracy, 
**              reliability, or otherwise. 
**
**              LIMITATION OF LIABILITY. In no event will Xilinx or its 
**              licensors be liable for any loss of data, lost profits, cost 
**              or procurement of substitute goods or services, or for any 
**              special, incidental, consequential, or indirect damages 
**              arising from the use or operation of the designs or 
**              accompanying documentation, however caused and on any theory 
**              of liability. This limitation will apply even if Xilinx 
**              has been advised of the possibility of such damage. This 
**              limitation shall apply not-withstanding the failure of the 
**              essential purpose of any limited remedies herein. 
**
**  Copyright 

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -