bjq1.fit

VHDL的课程设计

-- MAX+plus II Compiler Fit File      
-- Version 9.23 3/19/99               
-- Compiled: 01/05/2022 09:12:48      

-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "bjq1"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "d0"                           : INPUT_PIN  = 84     ;
    "d1"                           : INPUT_PIN  = 70     ;
    "d2"                           : INPUT_PIN  = 71     ;
    "d3"                           : INPUT_PIN  = 72     ;
    "m0"                           : INPUT_PIN  = 73     ;
    "m1"                           : INPUT_PIN  = 43     ;
    "m2"                           : INPUT_PIN  = 1      ;
    "m3"                           : INPUT_PIN  = 42     ;
    "sel0"                         : INPUT_PIN  = 44     ;
    "sel1"                         : INPUT_PIN  = 2      ;
    "result"                       : OUTPUT_PIN = 18     ;
    ":141"                         : LOCATION   = LC5_A1 ;
    "~141~1"                       : LOCATION   = LC1_A1 ;
    "~141~2"                       : LOCATION   = LC2_A1 ;

END;

INTERNAL_INFO "bjq1"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD0P84  : LORAX = "1:FB0|2:FH0R0,PA0R0C0->LC2_A1||";
    OH4R0P70 : LORAX = "1:G47R0,PA3R0C0->LC2_A1|";
    OH3R0P71 : LORAX = "1:G37R0,PA1R0C0->LC1_A1|";
    OH2R0P72 : LORAX = "1:G46R0,PA4R0C0->LC1_A1|";
    OH0R0P73 : LORAX = "1:G10R0,PA11R0C0->LC2_A1|";
    OD5P43  : LORAX = "1:FB5|2:CH1R0,PA7R0C0->LC2_A1||";
    OD4P1   : LORAX = "1:FB4|2:CH0R0,PA19R0C0->LC1_A1||";
    OD3P42  : LORAX = "1:FB3|2:FH3R0,PA5R0C0->LC1_A1||";
    OD2P44  : LORAX = "1:FB2|2:FH2R0,PA6R0C0->LC5_A1||";
    OD1P2   : LORAX = "1:FB1|2:FH1R0,PA20R0C0->LC5_A1||";
    LC5_A1  : LORAX = "1:MSW4R0C0,HHL41R0->OH12R0P18|";
	LC1_A1  : LORAX2 = "OD4P1, OH3R0P71, OH2R0P72, OD3P42";
	LC2_A1  : LORAX2 = "OH0R0P73, OD0P84, OH4R0P70, OD5P43";
	LC5_A1  : LORAX2 = "OD2P44, OD1P2, LC2_A1, LC1_A1";
END;