mux51a.vhd

来自「DE2板上的hello程序,实现在8个七段译码器上循环显示hello」· VHDL 代码 · 共 40 行

library IEEE;
use IEEE.std_logic_1164.all;

entity mux51a is              --3bit输入的5选1多路选择器 随 s 的递增分别选择u,v,w,x,y
	port
		(              
		                 s : in  std_logic_vector(2 downto 0);
		 u , v , w , x , y : in  std_logic_vector(2 downto 0);
						 m : out std_logic_vector(2 downto 0)
		);
end;

architecture bhav of mux51a is

	component s_machine
		port
		(
			  sin : in  std_logic_vector(2 downto 0);
			state : in  std_logic_vector(2 downto 0);
			 sout : out std_logic_vector(2 downto 0)
		);
	end component;
	
	component mux21b
		port
		( X , Y : in  std_logic_vector(2 downto 0);
			  S : in  std_logic;
			  M : out std_logic_vector(2 downto 0)
		);
	end component;
	
	signal m0 , m1 , m2 , m3: std_logic_vector(2 downto 0);
	
	begin
		u1 : mux21b port map(X=>u , Y=>v , S=>s(0) , M=>m0);
		u2 : mux21b port map(X=>w , Y=>x , S=>s(0) , M=>m1);
		u3 : mux21b port map(X=>m0 , Y=>m1 , S=>s(1) , M=>m2);
		u4 : mux21b port map(X=>m2 , Y=>y , S=>s(2) , M=>m3);
		u5 : s_machine port map(sin=>m3 , state=>s , sout=>m);
end architecture bhav;