buzz.v

来自「利用xilinx实现一个简易的电子琴。简谱中的音名与频率一一对应。」· Verilog 代码 · 共 21 行

module buzz ( clk,buzzout);
	input clk;
	output buzzout;
	reg buzzout_reg;
	reg [30:0] counter;
	
	always @ (posedge clk)
	begin
		counter=counter+1;
	end

	always @ (counter[7])
	begin
		if(counter[25]&counter[27])
		buzzout_reg=!(counter[11]&counter[21]);
	end

assign buzzout=buzzout_reg;
endmodule