📄 automake.log
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WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_10 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_11"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_11 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_12"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_12 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_13"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_13 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_14"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_14 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_15"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_15 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_2"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_2 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_3"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_3 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_4"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_4 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_5"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_5 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_6"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_6 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_7"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_7 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_8"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_8 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Madd__old_count_1_Mxor_Result_9"...WARNING:LBEngine:353 - Module Madd__old_count_1_Mxor_Result_9 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0008"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0008 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0009"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0009 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0010"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0010 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0011"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0011 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0012"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0012 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0013"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0013 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0014"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0014 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0015"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0015 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0016"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0016 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol "Mcompar__n0000_Mxor__n0017"...WARNING:LBEngine:353 - Module Mcompar__n0000_Mxor__n0017 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_1__Mxor__n0000"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_1__Mxor__n0000 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_1__Mxor_Result"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_1__Mxor_Result : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_2__Mxor__n0000"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_2__Mxor__n0000 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_2__Mxor_Result"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_2__Mxor_Result : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_3__Mxor__n0000"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_3__Mxor__n0000 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_3__Mxor_Result"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_3__Mxor_Result : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_4__Mxor__n0000"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_4__Mxor__n0000 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_4__Mxor_Result"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_4__Mxor_Result : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_5__Mxor__n0000"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_5__Mxor__n0000 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_5__Mxor_Result"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_5__Mxor_Result : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_6__Mxor__n0000"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_6__Mxor__n0000 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_6__Mxor_Result"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_6__Mxor_Result : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_7__Mxor__n0000"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_7__Mxor__n0000 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_7__Mxor_Result"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_7__Mxor_Result : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_8__Mxor__n0000"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_8__Mxor__n0000 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_8__Mxor_Result"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_8__Mxor_Result : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_9__Mxor__n0000"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_9__Mxor__n0000 : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Running LogiBLOX expansion on symbol"pwm_count_Maddsub__n0000_Mxor_Result_9__Mxor_Result"...WARNING:LBEngine:353 - Module pwm_count_Maddsub__n0000_Mxor_Result_9__Mxor_Result : All styles for SIMPLE_GATES are implemented identically for the XC9500 family.Annotating constraints to design from file "pwm.ucf" ...Checking timing specifications ...Checking expanded design ...NGDBUILD Design Results Summary: Number of errors: 0 Number of warnings: 0Writing NGD file "pwm.ngd" ...Writing NGDBUILD log file "pwm.bld"...NGDBUILD done.Tcl d:/Xilinx_WebPACK/data/projnav/_edfTOngd.tcl detected that program 'ngdbuild -f ngdbuild.rsp' completed successfully.Done: completed successfully.
Starting: 'exewrap -mode pipe -tapkeep -tcl -command _cpldfit.tcl'
Creating TCL ProcessStarting: 'cpldfit -f _cpldfit.rsp pwm.ngd'Release 4.1WP3.x - X9K/XPLA Optimizer/Partitioner E.33Copyright (c) 1995-2001 Xilinx, Inc. All rights reserved.Considering device XC95108-PC84.Flattening design..Multi-level logic optimization...Timing optimization.....................................................Timing driven global resource optimizationGeneral global resource optimization........Re-checking device resources ...Mapping a total of 62 equations into 6 function blocks.........................Design pwm has been optimized and fit into device XC95108-7-PC84.Tcl _cpldfit.tcl detected that program 'cpldfit -f _cpldfit.rsp pwm.ngd' completed successfully.Done: completed successfully.
Starting: 'exewrap -mode pipe -tapkeep -command hprep6 -i pwm -r int -a -l pwm.log -n pwm '
Starting: 'hprep6 -i pwm -r int -a -l pwm.log -n pwm 'Release 4.1WP3.x - Programming File Generator E.33Copyright (c) 1995-2001 Xilinx, Inc. All rights reserved.EXEWRAP detected that program 'hprep6' completed successfully.Done: completed successfully.
Launching: 'impact -f __impact.rsp'
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