📄 pwm.rpt
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count_13 19 14<- 0 0 FB3_13 STD (b) (b)
(unused) 0 0 /\5 0 FB3_14 24 I/O (b)
(unused) 0 0 \/5 0 FB3_15 25 I/O (b)
count_14 19 14<- 0 0 FB3_16 STD 26 I/O (b)
(unused) 0 0 /\5 0 FB3_17 31 I/O (b)
count1_10 1 0 /\4 0 FB3_18 STD (b) (b)
Signals Used by Logic in Function Block
1: "N243/N243_D" 13: count1_10.FBK.LFBK
25: count1_9.FBK.LFBK
2: "N244/N244_D" 14: count1_11.FBK.LFBK
26: pwm_count_0
3: "N245/N245_D" 15: count1_12.FBK.LFBK
27: pwm_count_1
4: "N246/N246_D" 16: count1_13.FBK.LFBK
28: pwm_count_2
5: "N247/N247_D" 17: count1_14.FBK.LFBK
29: pwm_count_3
6: "N248/N248_D" 18: count1_2 30: pwm_count_4
7: "N249/N249_D" 19: count1_3 31: pwm_count_5
8: "N250/N250_D" 20: count1_4 32: pwm_count_6
9: "N251/N251_D" 21: count1_5 33: pwm_count_7
10: "N252/N252_D" 22: count1_6 34: pwm_count_8
11: count1_0 23: count1_7 35: pwm_count_9
12: count1_1 24: count1_8.FBK.LFBK
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
N365/N365_D2 XXXXXXXXXX...............XXXXXXXXXX..... 20 20
count1_9 ..........XX.....XXXXXXX................ 9 9
count1_8 ..........XX.....XXXXXX................. 8 8
count1_15 ..........XXXXXXXXXXXXXXX............... 15 15
count1_14 ..........XXXXXX.XXXXXXXX............... 14 14
count1_13 ..........XXXXX..XXXXXXXX............... 13 13
count1_12 ..........XXXX...XXXXXXXX............... 12 12
count1_11 ..........XXX....XXXXXXXX............... 11 11
count_13 XXXXXXXXXX...............XXXXXXXXXX..... 20 20
count_14 XXXXXXXXXX...............XXXXXXXXXX..... 20 20
count1_10 ..........XX.....XXXXXXXX............... 10 10
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK/FCLK - Global clock
O - Output GTS/FOE - Global 3state/output-enable
(b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB4 ***********************************
Number of function block inputs used/remaining: 27/9
Number of signals used by logic mapping into function block: 27
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 \/5 0 FB4_1 (b) (b)
count_2 20 15<- 0 0 FB4_2 STD 57 I/O (b)
(unused) 0 0 /\5 0 FB4_3 58 I/O (b)
pwm_count_9 3 1<- /\3 0 FB4_4 STD (b) (b)
(unused) 0 0 /\1 4 FB4_5 61 I/O (b)
pwm_count_2 3 0 \/2 0 FB4_6 STD 62 I/O (b)
(unused) 0 0 \/5 0 FB4_7 (b) (b)
count_3 20 15<- 0 0 FB4_8 STD 63 I/O (b)
(unused) 0 0 /\5 0 FB4_9 65 I/O (b)
pwm_count_3 3 1<- /\3 0 FB4_10 STD (b) (b)
pwm_count_4 3 0 /\1 1 FB4_11 STD 66 I/O (b)
pwm_count_5 3 0 \/2 0 FB4_12 STD 67 I/O (b)
(unused) 0 0 \/5 0 FB4_13 (b) (b)
pwm_out 20 15<- 0 0 FB4_14 STD 68 I/O O
(unused) 0 0 /\5 0 FB4_15 69 I/O (b)
pwm_count_6 3 1<- /\3 0 FB4_16 STD (b) (b)
pwm_count_7 3 0 /\1 1 FB4_17 STD 70 I/O (b)
pwm_count_8 3 0 \/2 0 FB4_18 STD (b) (b)
Signals Used by Logic in Function Block
1: "$OpTx$$OpTx$FX_DC$18_INV$118"
10: "N250/N250_D" 19: pwm_count_1
2: "$OpTx$FX_DC$19" 11: "N251/N251_D" 20: pwm_count_2.FBK.LFBK
3: "N243/N243_D" 12: "N252/N252_D" 21: pwm_count_3.FBK.LFBK
4: "N244/N244_D" 13: "N428/N428_D2" 22: pwm_count_4.FBK.LFBK
5: "N245/N245_D" 14: "N431/N431_D2" 23: pwm_count_5.FBK.LFBK
6: "N246/N246_D" 15: "keyin<0>" 24: pwm_count_6.FBK.LFBK
7: "N247/N247_D" 16: "keyin<1>" 25: pwm_count_7.FBK.LFBK
8: "N248/N248_D" 17: count1_15 26: pwm_count_8.FBK.LFBK
9: "N249/N249_D" 18: pwm_count_0 27: pwm_count_9.FBK.LFBK
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
count_2 X.XXXXXXXXXXX....XXXXXXXXXX............. 22 22
pwm_count_9 ..............XXXXXXXXXXXX.............. 12 12
pwm_count_2 ..............XXXXX..................... 5 5
count_3 .XXXXXXXXXXX.X...XXXXXXXXXX............. 22 22
pwm_count_3 ..............XXXXXX.................... 6 6
pwm_count_4 ..............XXXXXXX................... 7 7
pwm_count_5 ..............XXXXXXXX.................. 8 8
pwm_out ..XXXXXXXXXX.....XXXXXXXXXX............. 20 20
pwm_count_6 ..............XXXXXXXXX................. 9 9
pwm_count_7 ..............XXXXXXXXXX................ 10 10
pwm_count_8 ..............XXXXXXXXXXX............... 11 11
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK/FCLK - Global clock
O - Output GTS/FOE - Global 3state/output-enable
(b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB5 ***********************************
Number of function block inputs used/remaining: 36/0
Number of signals used by logic mapping into function block: 36
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 /\5 0 FB5_1 (b) (b)
N247/N247_D 2 0 /\3 0 FB5_2 STD 32 I/O (b)
N245/N245_D 2 0 \/1 2 FB5_3 STD 33 I/O (b)
N244/N244_D 2 1<- \/4 0 FB5_4 STD (b) (b)
(unused) 0 0 \/5 0 FB5_5 34 I/O (b)
count_8 19 14<- 0 0 FB5_6 STD 35 I/O (b)
(unused) 0 0 /\5 0 FB5_7 (b) (b)
(unused) 0 0 \/5 0 FB5_8 36 I/O (b)
(unused) 0 0 \/5 0 FB5_9 37 I/O (b)
(unused) 0 0 \/5 0 FB5_10 (b) (b)
count_7 19 15<- \/1 0 FB5_11 STD 39 I/O (b)
(unused) 0 0 \/5 0 FB5_12 40 I/O (b)
count_6 19 14<- 0 0 FB5_13 STD (b) (b)
(unused) 0 0 /\5 0 FB5_14 41 I/O (b)
N246/N246_D 2 0 /\3 0 FB5_15 STD 43 I/O (b)
N248/N248_D 2 0 \/1 2 FB5_16 STD (b) (b)
(unused) 0 0 \/5 0 FB5_17 44 I/O (b)
count_15 19 14<- 0 0 FB5_18 STD (b) (b)
Signals Used by Logic in Function Block
1: "N243/N243_D" 13: count_10 25: count_8.FBK.LFBK
2: "N244/N244_D.FBK".LFBK
14: count_11 26: count_9
3: "N245/N245_D.FBK".LFBK
15: count_12 27: pwm_count_0
4: "N246/N246_D.FBK".LFBK
16: count_13 28: pwm_count_1
5: "N247/N247_D.FBK".LFBK
17: count_14 29: pwm_count_2
6: "N248/N248_D.FBK".LFBK
18: count_15.FBK.LFBK 30: pwm_count_3
7: "N249/N249_D" 19: count_2 31: pwm_count_4
8: "N250/N250_D" 20: count_3 32: pwm_count_5
9: "N251/N251_D" 21: count_4 33: pwm_count_6
10: "N252/N252_D" 22: count_5 34: pwm_count_7
11: count_0 23: count_6.FBK.LFBK 35: pwm_count_8
12: count_1 24: count_7.FBK.LFBK 36: pwm_count_9
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
N247/N247_D ..........XXXXXXX.XXXXXXXX.............. 15 15
N245/N245_D ..........XXXXX...XXXXXXXX.............. 13 13
N244/N244_D ..........XXXX....XXXXXXXX.............. 12 12
count_8 XXXXXXXXXX................XXXXXXXXXX.... 20 20
count_7 XXXXXXXXXX................XXXXXXXXXX.... 20 20
count_6 XXXXXXXXXX................XXXXXXXXXX.... 20 20
N246/N246_D ..........XXXXXX..XXXXXXXX.............. 14 14
N248/N248_D ..........XXXXXXXXXXXXXXXX.............. 16 16
count_15 XXXXXXXXXX................XXXXXXXXXX.... 20 20
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK/FCLK - Global clock
O - Output GTS/FOE - Global 3state/output-enable
(b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB6 ***********************************
Number of function block inputs used/remaining: 35/1
Number of signals used by logic mapping into function block: 35
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
count_9 19 14<- 0 0 FB6_1 STD (b) (b)
(unused) 0 0 /\5 0 FB6_2 45 I/O (b)
N437/N437_D2 1 0 /\2 2 FB6_3 STD 46 I/O (b)
N434/N434_D2 1 0 0 4 FB6_4 STD (b) (b)
N431/N431_D2 1 0 0 4 FB6_5 STD 47 I/O (b)
N428/N428_D2 1 0 0 4 FB6_6 STD 48 I/O (b)
pwm_count_0 2 0 0 3 FB6_7 STD (b) (b)
count_1 2 0 0 3 FB6_8 STD 50 I/O (b)
N252/N252_D 2 0 0 3 FB6_9 STD 51 I/O (b)
N251/N251_D 2 0 0 3 FB6_10 STD (b) (b)
N249/N249_D 2 0 0 3 FB6_11 STD 52 I/O (b)
N243/N243_D 2 0 0 3 FB6_12 STD 53 I/O (b)
$OpTx$FX_DC$21 2 0 0 3 FB6_13 STD (b) (b)
$OpTx$FX_DC$20 2 0 0 3 FB6_14 STD 54 I/O I
$OpTx$FX_DC$19 2 0 0 3 FB6_15 STD 55 I/O I
$OpTx$$OpTx$FX_DC$18_INV$118
2 0 0 3 FB6_16 STD (b) (b)
pwm_count_1 3 0 \/2 0 FB6_17 STD 56 I/O (b)
(unused) 0 0 \/5 0 FB6_18 (b) (b)
Signals Used by Logic in Function Block
1: "N243/N243_D.FBK".LFBK
13: "keyin<1>" 25: count_9.FBK.LFBK
2: "N244/N244_D" 14: count1_15 26: pwm_count_0.FBK.LFBK
3: "N245/N245_D" 15: count_0 27: pwm_count_1.FBK.LFBK
4: "N246/N246_D" 16: count_1.FBK.LFBK 28: pwm_count_2
5: "N247/N247_D" 17: count_10 29: pwm_count_3
6: "N248/N248_D" 18: count_2 30: pwm_count_4
7: "N249/N249_D.FBK".LFBK
19: count_3 31: pwm_count_5
8: "N250/N250_D" 20: count_4 32: pwm_count_6
9: "N251/N251_D.FBK".LFBK
21: count_5 33: pwm_count_7
10: "N252/N252_D.FBK".LFBK
22: count_6 34: pwm_count_8
11: "N365/N365_D2" 23: count_7 35: pwm_count_9
12: "keyin<0>" 24: count_8
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
count_9 XXXXXXXXXX...............XXXXXXXXXX..... 20 20
N437/N437_D2 ..............XX.XXXX................... 6 6
N434/N434_D2 ..............XX.XXX.................... 5 5
N431/N431_D2 ..............XX.XX..................... 4 4
N428/N428_D2 ..............XX.X...................... 3 3
pwm_count_0 ...........XXX.......................... 3 3
count_1 ..........X...XX........................ 3 3
N252/N252_D ..............XX.XXXXXXXX............... 10 10
N251/N251_D ..............XX.XXXXXXX................ 9 9
N249/N249_D ..............XX.XXXXX.................. 7 7
N243/N243_D ..............XXXXXXXXXXX............... 11 11
$OpTx$FX_DC$21 ..............XX.XXXX................... 6 6
$OpTx$FX_DC$20 ..............XX.XXX.................... 5 5
$OpTx$FX_DC$19 ..............XX.XX..................... 4 4
$OpTx$$OpTx$FX_DC$18_INV$118
..............XX.X...................... 3 3
pwm_count_1 ...........XXX...........X.............. 4 4
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK/FCLK - Global clock
O - Output GTS/FOE - Global 3state/output-enable
(b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
;;-----------------------------------------------------------------;;
; Implemented Equations.
"$OpTx$$OpTx$FX_DC$18_INV$118" = /count_0 * /count_2
+ /count_2 * /count_1.FBK.LFBK
"$OpTx$FX_DC$19" = count_3
+ count_0 * count_2 * count_1.FBK.LFBK
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