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📄 traffic.rpt

📁 xilinx完成一个模拟的十字路口交通信号灯
💻 RPT
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count_0               9       4<-   0   0     FB3_18  STD         (b)     (b)

Signals Used by Logic in Function Block
  1: count_0.FBK.LFBK  12: count_20.FBK.LFBK 22: lamp_time_0.FBK.LFBK 
  2: count_10          13: count_21.FBK.LFBK 23: lamp_time_1 
  3: count_11          14: count_4           24: lamp_time_2 
  4: count_12          15: count_5           25: lamp_time_3 
  5: count_13          16: count_6           26: lamp_time_4.FBK.LFBK 
  6: count_14          17: count_7           27: lamp_time_5.FBK.LFBK 
  7: count_15          18: count_8           28: lamp_time_6.FBK.LFBK 
  8: count_16          19: count_9           29: lamp_time_7.FBK.LFBK 
  9: count_17          20: lamp_status_0.FBK.LFBK 
                                             30: led_reg_0.FBK.LFBK 
 10: count_18          21: lamp_status_1.FBK.LFBK 
                                             31: sec_tick_2 
 11: count_19         

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
sec_tick_0           .XXXXXXXXXXXXXXXXXX..................... 18      18
count_21             ........................................ 0       0
count_20             ........................................ 0       0
lamp_status_0        ....................XXXXXXXXX.X......... 10      10
lamp_time_7          ...................XXXXXXXXXX.X......... 11      11
lamp_status_1        ...................XXXXXXXXXX.X......... 11      11
lamp_time_6          ...................XXXXXXXXXX.X......... 11      11
lamp_time_0          ...................XXXXXXXXXX.X......... 11      11
lamp_time_5          ...................XXXXXXXXXX.X......... 11      11
lamp_time_4          ...................XXXXXXXXXX.X......... 11      11
led<0>               ...................XXXXXXXXXXXX......... 12      12
count_0              XXXXXXXXXXXXXXXXXXX..................... 19      19
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB4 ***********************************
Number of function block inputs used/remaining:               24/12
Number of signals used by logic mapping into function block:  24
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #    Type    Use
(unused)              0       0   \/5   0     FB4_1               (b)     (b)
count_1              11       6<-   0   0     FB4_2   STD   57    I/O     (b)
(unused)              0       0   /\1   4     FB4_3         58    I/O     (b)
(unused)              0       0     0   5     FB4_4               (b)     
(unused)              0       0     0   5     FB4_5         61    I/O     
(unused)              0       0     0   5     FB4_6         62    I/O     
(unused)              0       0     0   5     FB4_7               (b)     
(unused)              0       0     0   5     FB4_8         63    I/O     
(unused)              0       0   \/5   0     FB4_9         65    I/O     (b)
sec_tick_2            9       5<- \/1   0     FB4_10  STD         (b)     (b)
count_9              11       6<-   0   0     FB4_11  STD   66    I/O     (b)
(unused)              0       0   /\5   0     FB4_12        67    I/O     (b)
(unused)              0       0   \/5   0     FB4_13              (b)     (b)
count_10             11       6<-   0   0     FB4_14  STD   68    I/O     (b)
sec_tick_1            9       5<- /\1   0     FB4_15  STD   69    I/O     (b)
(unused)              0       0   /\5   0     FB4_16              (b)     (b)
(unused)              0       0     0   5     FB4_17        70    I/O     
(unused)              0       0     0   5     FB4_18              (b)     

Signals Used by Logic in Function Block
  1: count_0            9: count_16          17: count_4 
  2: count_1.FBK.LFBK  10: count_17          18: count_5 
  3: count_10.FBK.LFBK 11: count_18          19: count_6 
  4: count_11          12: count_19          20: count_7 
  5: count_12          13: count_2           21: count_8 
  6: count_13          14: count_20          22: count_9.FBK.LFBK 
  7: count_14          15: count_21          23: sec_tick_0 
  8: count_15          16: count_3           24: sec_tick_1.FBK.LFBK 

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
count_1              XXXXXXXXXXXX.XX.XXXXXX.................. 20      20
sec_tick_2           ..XXXXXXXXXX.XX.XXXXXXXX................ 20      20
count_9              XX..XXXXXXXXXXXXXXXXXX.................. 20      20
count_10             XXX.XXXXXXXXXXXXXXXXXX.................. 21      21
sec_tick_1           ..XXXXXXXXXX.XX.XXXXXXX................. 19      19
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB5 ***********************************
Number of function block inputs used/remaining:               20/16
Number of signals used by logic mapping into function block:  20
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #    Type    Use
(unused)              0       0   /\5   0     FB5_1               (b)     (b)
led<1>                4       0   \/1   0     FB5_2   STD   32    I/O     O
led<2>                3       1<- \/3   0     FB5_3   STD   33    I/O     O
lamp_time_2          11       6<-   0   0     FB5_4   STD         (b)     (b)
led<3>                3       1<- /\3   0     FB5_5   STD   34    I/O     O
led<4>                3       0   /\1   1     FB5_6   STD   35    I/O     O
lamp_time_3           6       1<-   0   0     FB5_7   STD         (b)     (b)
led<5>                3       0   /\1   1     FB5_8   STD   36    I/O     O
led<6>                4       0     0   1     FB5_9   STD   37    I/O     O
(unused)              0       0   \/1   4     FB5_10              (b)     (b)
led<7>                3       1<- \/3   0     FB5_11  STD   39    I/O     O
sled<0>               8       3<-   0   0     FB5_12  STD   40    I/O     O
(unused)              0       0   \/4   1     FB5_13              (b)     (b)
sled<1>               8       4<- \/1   0     FB5_14  STD   41    I/O     O
sled<2>               6       1<-   0   0     FB5_15  STD   43    I/O     O
(unused)              0       0   \/5   0     FB5_16              (b)     (b)
sled<3>               8       5<- \/2   0     FB5_17  STD   44    I/O     O
lamp_time_1          12       7<-   0   0     FB5_18  STD         (b)     (b)

Signals Used by Logic in Function Block
  1: count_11           8: lamp_time_3.FBK.LFBK 
                                             15: led_reg_3.FBK.LFBK 
  2: count_12           9: lamp_time_4       16: led_reg_4.FBK.LFBK 
  3: lamp_status_0     10: lamp_time_5       17: led_reg_5.FBK.LFBK 
  4: lamp_status_1     11: lamp_time_6       18: led_reg_6.FBK.LFBK 
  5: lamp_time_0       12: lamp_time_7       19: led_reg_7.FBK.LFBK 
  6: lamp_time_1.FBK.LFBK 
                       13: led_reg_1.FBK.LFBK 
                                             20: sec_tick_2 
  7: lamp_time_2.FBK.LFBK 
                       14: led_reg_2.FBK.LFBK 
                                            

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
led<1>               ..XXXXXXXXXXX......X.................... 12      12
led<2>               ..XXXXXXXXXX.X.....X.................... 12      12
lamp_time_2          ..XXXXXXXXXX.......X.................... 11      11
led<3>               ..XXXXXXXXXX..X....X.................... 12      12
led<4>               ..XXXXXXXXXX...X...X.................... 12      12
lamp_time_3          ..XXXXXXXXXX.......X.................... 11      11
led<5>               ..XXXXXXXXXX....X..X.................... 12      12
led<6>               ..XXXXXXXXXX.....X.X.................... 12      12
led<7>               ..XXXXXXXXXX......XX.................... 12      12
sled<0>              XX..XXXXXXXX............................ 10      10
sled<1>              XX..XXXXXXXX............................ 10      10
sled<2>              XX..XXXXXXXX............................ 10      10
sled<3>              XX..XXXXXXXX............................ 10      10
lamp_time_1          ..XXXXXXXXXX.......X.................... 11      11
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB6 ***********************************
Number of function block inputs used/remaining:               30/6
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #    Type    Use
(unused)              0       0   /\5   0     FB6_1               (b)     (b)
sled<4>               6       2<- /\1   0     FB6_2   STD   45    I/O     O
sled<5>               8       5<- /\2   0     FB6_3   STD   46    I/O     O
(unused)              0       0   /\5   0     FB6_4               (b)     (b)
sled<6>               7       2<-   0   0     FB6_5   STD   47    I/O     O
sled<7>               0       0   /\2   3     FB6_6   STD   48    I/O     O
(unused)              0       0     0   5     FB6_7               (b)     
slcs<0>               1       0   \/1   3     FB6_8   STD   50    I/O     O
slcs<1>               1       1<- \/5   0     FB6_9   STD   51    I/O     O
count_5              15      10<-   0   0     FB6_10  STD         (b)     (b)
slcs<2>               1       1<- /\5   0     FB6_11  STD   52    I/O     O
slcs<3>               1       0   /\1   3     FB6_12  STD   53    I/O     O
(unused)              0       0   \/5   0     FB6_13              (b)     (b)
count_7              16      11<-   0   0     FB6_14  STD   54    I/O     (b)
(unused)              0       0   /\5   0     FB6_15        55    I/O     (b)
(unused)              0       0   /\1   4     FB6_16              (b)     (b)
(unused)              0       0   \/5   0     FB6_17        56    I/O     (b)
count_8              16      11<-   0   0     FB6_18  STD         (b)     (b)

Signals Used by Logic in Function Block
  1: count_0           11: count_18          21: count_8.FBK.LFBK 
  2: count_1           12: count_19          22: count_9 
  3: count_10          13: count_2           23: lamp_time_0 
  4: count_11          14: count_20          24: lamp_time_1 
  5: count_12          15: count_21          25: lamp_time_2 
  6: count_13          16: count_3           26: lamp_time_3 
  7: count_14          17: count_4           27: lamp_time_4 
  8: count_15          18: count_5.FBK.LFBK  28: lamp_time_5 
  9: count_16          19: count_6           29: lamp_time_6 
 10: count_17          20: count_7.FBK.LFBK  30: lamp_time_7 

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
sled<4>              ...XX.................XXXXXXXX.......... 10      10
sled<5>              ...XX.................XXXXXXXX.......... 10      10
sled<6>              ...XX.................XXXXXXXX.......... 10      10
sled<7>              ........................................ 0       0
slcs<0>              ...XX................................... 2       2
slcs<1>              ...XX................................... 2       2
count_5              XXXXXXXXXXXXXXXXXXXXXX.................. 22      22
slcs<2>              ...XX................................... 2       2
slcs<3>              ...XX................................... 2       2
count_7              XXXXXXXXXXXXXXXXXXXXXX.................. 22      22
count_8              XXXXXXXXXXXXXXXXXXXXXX.................. 22      22
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
;;-----------------------------------------------------------------;;
; Implemented Equations.

/"slcs<1>"  =  ;Imported pterms FB6_8
	  /count_12 * count_11    

/"slcs<2>"  =  ;Imported pterms FB6_12
	  count_12 * /count_11    

/"slcs<3>"  =  count_12 * count_11    

 "sled<0>"  =  count_12 * lamp_time_0 * count_11 * 
	lamp_time_1.FBK.LFBK * lamp_time_3.FBK.LFBK * /lamp_time_2.FBK.LFBK
	+ count_12 * lamp_time_0 * count_11 * 
	/lamp_time_1.FBK.LFBK * lamp_time_3.FBK.LFBK * lamp_time_2.FBK.LFBK
	+ count_12 * lamp_time_0 * count_11 * 
	/lamp_time_1.FBK.LFBK * /lamp_time_3.FBK.LFBK * /lamp_time_2.FBK.LFBK
	+ count_12 * /lamp_time_0 * count_11 * 
	/lamp_time_1.FBK.LFBK * /lamp_time_3.FBK.LFBK * lamp_time_2.FBK.LFBK
	+ count_12 * /count_11 * lamp_time_4 * lamp_time_5 * 
	/lamp_time_6 * lamp_time_7
;Imported pterms FB5_11
	+ count_12 * /count_11 * lamp_time_4 * /lamp_time_5 * 
	lamp_time_6 * lamp_time_7

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