trafic.mod

来自「CPLD lattice1032 VHDL实现交通灯控制！」· MOD 代码 · 共 51 行

MODEL
MODEL_VERSION "1.0";
DESIGN "trafic";
DATE "Thu Dec 06 15:42:40 2007";
VENDOR "Lattice Semiconductor Corporation";
PROGRAM "STAMP Model Generator";

/* port name and type */
INPUT CLK1;
INPUT XRESET;
INPUT CLK;
OUTPUT SEGOUT_5;
OUTPUT SEGOUT_2;
OUTPUT SELOUT_3;
OUTPUT G1;
OUTPUT SELOUT_0;
OUTPUT G2;
OUTPUT SEGOUT_6;
OUTPUT SEGOUT_3;
OUTPUT SEGOUT_0;
OUTPUT SELOUT_1;
OUTPUT SEGOUT_7;
OUTPUT R1;
OUTPUT SEGOUT_4;
OUTPUT R2;
OUTPUT SEGOUT_1;
OUTPUT Y1;
OUTPUT Y2;
OUTPUT SELOUT_2;

/* timing arc definitions */
CLK1_SELOUT_2_delay: DELAY CLK1 SELOUT_2;
CLK1_SEGOUT_1_delay: DELAY CLK1 SEGOUT_1;
CLK1_SEGOUT_4_delay: DELAY CLK1 SEGOUT_4;
CLK1_SEGOUT_7_delay: DELAY CLK1 SEGOUT_7;
CLK1_SELOUT_1_delay: DELAY CLK1 SELOUT_1;
CLK1_SEGOUT_3_delay: DELAY CLK1 SEGOUT_3;
CLK1_SEGOUT_6_delay: DELAY CLK1 SEGOUT_6;
CLK1_SELOUT_0_delay: DELAY CLK1 SELOUT_0;
CLK1_SELOUT_3_delay: DELAY CLK1 SELOUT_3;
CLK1_SEGOUT_2_delay: DELAY CLK1 SEGOUT_2;
CLK1_SEGOUT_5_delay: DELAY CLK1 SEGOUT_5;
CLK1_SELOUT_2_delay: DELAY CLK1 SELOUT_2;
CLK1_SELOUT_1_delay: DELAY CLK1 SELOUT_1;
CLK1_SELOUT_0_delay: DELAY CLK1 SELOUT_0;
CLK1_SELOUT_3_delay: DELAY CLK1 SELOUT_3;

/* timing check arc definitions */

ENDMODEL