cop2000.bld

cop2000试验仪的模拟器

Release 4.2.03i - ngdbuild E.38
Copyright (c) 1995-2001 Xilinx, Inc.  All rights reserved.

Command Line: ngdbuild -p xcv200-6-pq240 -uc cop2000.ucf -dd ..
c:\cop2000p\xcv200\cop2000\cop2000.edf cop2000.ngd 

Launcher: Executing edif2ngd "c:\cop2000p\xcv200\cop2000\cop2000.edf"
"c:\cop2000p\xcv200\cop2000\xproj\ver1\cop2000.ngo"
INFO:NgdBuild - Release 4.2.03i - edif2ngd E.38
INFO:NgdBuild - Copyright (c) 1995-2001 Xilinx, Inc.  All rights reserved.
Writing the design to "c:/cop2000p/xcv200/cop2000/xproj/ver1/cop2000.ngo"...
Reading NGO file "c:/cop2000p/xcv200/cop2000/xproj/ver1/cop2000.ngo" ...
Reading component libraries for design expansion...

Annotating constraints to design from file "cop2000.ucf" ...

Checking timing specifications ...
Checking expanded design ...
WARNING:NgdBuild:477 - clock net 'clk_BUFGPed' has non-clock connections
WARNING:NgdBuild:479 - The input pad net 'i_req' is driving one or more clock
   loads that should only use a dedicated clock buffer. This could result in
   large clock skews on this net. Check whether the correct type of BUF is being
   used to drive the clock buffer.

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   2

Writing NGD file "cop2000.ngd" ...

Writing NGDBUILD log file "cop2000.bld"...