int_to_vector_suo.tan.qmsg

整型到字符型的转换

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Oct 29 12:09:46 2007 " "Info: Processing started: Mon Oct 29 12:09:46 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off int_to_vector_suo -c int_to_vector_suo --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off int_to_vector_suo -c int_to_vector_suo --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "input\[2\] q\[2\] 7.041 ns Longest " "Info: Longest tpd from source pin \"input\[2\]\" to destination pin \"q\[2\]\" is 7.041 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.837 ns) 0.837 ns input\[2\] 1 PIN PIN_W16 1 " "Info: 1: + IC(0.000 ns) + CELL(0.837 ns) = 0.837 ns; Loc. = PIN_W16; Fanout = 1; PIN Node = 'input\[2\]'" {  } { { "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { input[2] } "NODE_NAME" } } { "int_to_vector_suo.vhd" "" { Text "e:/edawork/int_to_vector_suo/int_to_vector_suo.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(4.242 ns) + CELL(1.962 ns) 7.041 ns q\[2\] 2 PIN PIN_W15 0 " "Info: 2: + IC(4.242 ns) + CELL(1.962 ns) = 7.041 ns; Loc. = PIN_W15; Fanout = 0; PIN Node = 'q\[2\]'" {  } { { "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "6.204 ns" { input[2] q[2] } "NODE_NAME" } } { "int_to_vector_suo.vhd" "" { Text "e:/edawork/int_to_vector_suo/int_to_vector_suo.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.799 ns ( 39.75 % ) " "Info: Total cell delay = 2.799 ns ( 39.75 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.242 ns ( 60.25 % ) " "Info: Total interconnect delay = 4.242 ns ( 60.25 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.041 ns" { input[2] q[2] } "NODE_NAME" } } { "e:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/71/quartus/bin/Technology_Viewer.qrui" "7.041 ns" { input[2] input[2]~combout q[2] } { 0.000ns 0.000ns 4.242ns } { 0.000ns 0.837ns 1.962ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "111 " "Info: Allocated 111 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon Oct 29 12:09:47 2007 " "Info: Processing ended: Mon Oct 29 12:09:47 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}