schk.map.eqn

序列发生器,产生一个8位序列号,序列码可自定义修改,还有一个序列检测器

-- Copyright (C) 1991-2006 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--Q[1] is Q[1]
Q[1] = DFFEAS(A1L11, clk, !clr,  ,  ,  ,  ,  ,  );


--Q[2] is Q[2]
Q[2] = DFFEAS(A1L14, clk, !clr,  ,  ,  ,  ,  ,  );


--Q[4] is Q[4]
Q[4] = DFFEAS(A1L17, clk, !clr,  ,  ,  ,  ,  ,  );


--Q[3] is Q[3]
Q[3] = DFFEAS(A1L19, clk, !clr,  ,  ,  ,  ,  ,  );


--Q[0] is Q[0]
Q[0] = DFFEAS(A1L20, clk, !clr,  ,  ,  ,  ,  ,  );


--A1L8 is Mux~1892
A1L8 = !Q[4] & !Q[3] & !Q[0];


--A1L5 is LessThan~60
A1L5 = Q[1] # Q[2] # !A1L8;


--A1L9 is Mux~1893
A1L9 = Q[2] & Q[4] # !Q[2] & (Q[3]);


--A1L10 is Mux~1894
A1L10 = Q[4] & (A1L9 & (Q[0]) # !A1L9 & !din) # !Q[4] & (din $ (A1L9));


--A1L11 is Mux~1895
A1L11 = Q[1] & !Q[0] & A1L10 # !Q[1] & Q[0] & !A1L10;


--A1L12 is Mux~1896
A1L12 = din & (Q[1] & !Q[2] & Q[0] # !Q[1] & Q[2] & !Q[0]);


--A1L13 is Mux~1897
A1L13 = Q[2] & (Q[1] & din & !Q[0] # !Q[1] & !din & Q[0]);


--A1L14 is Mux~1898
A1L14 = Q[4] & !Q[3] & A1L12 & !A1L13 # !Q[4] & (A1L12 $ A1L13);


--A1L15 is Mux~1899
A1L15 = Q[1] & Q[2] & Q[0] & !din;


--A1L16 is Mux~1900
A1L16 = Q[2] & din & !Q[0] & !Q[1] # !Q[2] & (din $ !Q[0]);


--A1L17 is Mux~1901
A1L17 = Q[4] & (A1L16 & !Q[3]) # !Q[4] & A1L15 & (Q[3]);


--A1L18 is Mux~1902
A1L18 = Q[0] & (din & (!Q[2]) # !din & !Q[1] & Q[2]) # !Q[0] & (din $ (Q[1] & !Q[2]));


--A1L19 is Mux~1903
A1L19 = !Q[4] & (Q[3] & (A1L18) # !Q[3] & A1L15);


--A1L6 is Mux~1888
A1L6 = Q[4] & !Q[3] & (din $ !Q[2]) # !Q[4] & din;


--A1L7 is Mux~1889
A1L7 = din & !Q[4] & (Q[2] # !Q[3]) # !din & !Q[2] & (Q[4] $ Q[3]);


--A1L20 is Mux~1904
A1L20 = !Q[0] & (Q[1] & (A1L7) # !Q[1] & A1L6);


--din is din
--operation mode is input

din = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--clr is clr
--operation mode is input

clr = INPUT();


--F is F
--operation mode is output

F = OUTPUT(A1L5);