new_pwm.sim.rpt

一个PWM参数器

; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~36                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~36                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~37                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~37                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~38                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~38                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~39                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~39                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~40                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~40                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~41                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~41                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~42                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~42                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~43                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~43                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~44                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~44                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~45                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~45                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~46                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~46                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~47                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~47                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~48                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~48                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~49                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~49                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~50                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~50                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~51                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~51                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~52                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~52                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~53                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~53                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~54                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~54                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~55                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~55                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~56                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~56                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~57                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~57                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~58                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~58                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~59                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~59                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~60                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~60                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~61                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~61                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~62                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~62                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~63                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~63                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~64                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~64                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~65                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~65                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~66                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~66                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~67                                  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|_~67                                  ; out0             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[16] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[16] ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[15] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[15]      ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[15] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[15] ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[14] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[14]      ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[14] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[14] ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[13] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[13]      ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[13] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[13] ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[12] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[12]      ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[12] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[12] ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[11] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[11]      ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[11] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[11] ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[10] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[10]      ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[10] ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[10] ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[9]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[9]       ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[9]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[9]  ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[8]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[8]       ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[8]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[8]  ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[7]       ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]  ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[6]       ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]  ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[5]       ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]  ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[4]       ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]  ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[3]       ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]  ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[2]       ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]  ; sout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[1]       ; cout             ;
; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]  ; |new_pwm|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]  ; sout             ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                                                  ;
+------------------------------------------------------------------------------+-------------------------------------------------------------------------+------------------+
; Node Name                                                                    ; Output Port Name                                                        ; Output Port Type ;
+------------------------------------------------------------------------------+-------------------------------------------------------------------------+------------------+
; |new_pwm|period~0                                                            ; |new_pwm|period~0                                                       ; out              ;
; |new_pwm|period~1                                                            ; |new_pwm|period~1                                                       ; out              ;
; |new_pwm|period~2                                                            ; |new_pwm|period~2                                                       ; out              ;
; |new_pwm|period~3                                                            ; |new_pwm|period~3                                                       ; out              ;
; |new_pwm|period~4                                                            ; |new_pwm|period~4                                                       ; out              ;
; |new_pwm|period~5                                                            ; |new_pwm|period~5                                                       ; out              ;
; |new_pwm|period~6                                                            ; |new_pwm|period~6                                                       ; out              ;
; |new_pwm|period~7                                                            ; |new_pwm|period~7                                                       ; out              ;
; |new_pwm|period~8                                                            ; |new_pwm|period~8                                                       ; out              ;
; |new_pwm|period~9                                                            ; |new_pwm|period~9                                                       ; out              ;
; |new_pwm|period~10                                                           ; |new_pwm|period~10                                                      ; out              ;
; |new_pwm|period~11                                                           ; |new_pwm|period~11                                                      ; out              ;
; |new_pwm|period~12                                                           ; |new_pwm|period~12                                                      ; out              ;
; |new_pwm|period~13                                                           ; |new_pwm|period~13                                                      ; out              ;
; |new_pwm|period~14                                                           ; |new_pwm|period~14                                                      ; out              ;
; |new_pwm|period~15                                                           ; |new_pwm|period~15                                                      ; out              ;