📄 new_pwm.fit.talkback.xml
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<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wrData[1]</name>
<pin__>115</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>24</x_coordinate>
<y_coordinate>14</y_coordinate>
<cell_number>0</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wrData[2]</name>
<pin__>93</pin__>
<i_o_bank>3</i_o_bank>
<x_coordinate>28</x_coordinate>
<y_coordinate>8</y_coordinate>
<cell_number>0</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wrData[3]</name>
<pin__>91</pin__>
<i_o_bank>3</i_o_bank>
<x_coordinate>28</x_coordinate>
<y_coordinate>7</y_coordinate>
<cell_number>0</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wrData[4]</name>
<pin__>90</pin__>
<i_o_bank>3</i_o_bank>
<x_coordinate>28</x_coordinate>
<y_coordinate>7</y_coordinate>
<cell_number>1</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wrData[5]</name>
<pin__>89</pin__>
<i_o_bank>3</i_o_bank>
<x_coordinate>28</x_coordinate>
<y_coordinate>7</y_coordinate>
<cell_number>2</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wrData[6]</name>
<pin__>88</pin__>
<i_o_bank>3</i_o_bank>
<x_coordinate>28</x_coordinate>
<y_coordinate>7</y_coordinate>
<cell_number>3</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wrData[7]</name>
<pin__>97</pin__>
<i_o_bank>3</i_o_bank>
<x_coordinate>28</x_coordinate>
<y_coordinate>9</y_coordinate>
<cell_number>0</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wrData[8]</name>
<pin__>114</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>26</x_coordinate>
<y_coordinate>14</y_coordinate>
<cell_number>2</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wrData[9]</name>
<pin__>87</pin__>
<i_o_bank>3</i_o_bank>
<x_coordinate>28</x_coordinate>
<y_coordinate>6</y_coordinate>
<cell_number>0</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>wr_en</name>
<pin__>96</pin__>
<i_o_bank>3</i_o_bank>
<x_coordinate>28</x_coordinate>
<y_coordinate>9</y_coordinate>
<cell_number>1</cell_number>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
</input_pins>
<output_pins>
<row>
<name>PwmOut</name>
<pin__>119</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>21</x_coordinate>
<y_coordinate>14</y_coordinate>
<cell_number>1</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>3.3-V LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
<load units="pF">0</load>
</row>
</output_pins>
<i_o_bank_usage>
<row>
<i_o_bank>1</i_o_bank>
<usage>3 / 19 ( 16 % )</usage>
<vccio_voltage>3.3V</vccio_voltage>
</row>
<row>
<i_o_bank>2</i_o_bank>
<usage>4 / 23 ( 17 % )</usage>
<vccio_voltage>3.3V</vccio_voltage>
</row>
<row>
<i_o_bank>3</i_o_bank>
<usage>12 / 23 ( 52 % )</usage>
<vccio_voltage>3.3V</vccio_voltage>
</row>
<row>
<i_o_bank>4</i_o_bank>
<usage>0 / 24 ( 0 % )</usage>
<vccio_voltage>3.3V</vccio_voltage>
</row>
</i_o_bank_usage>
<advanced_data___general>
<row>
<name>Status Code</name>
<value>0</value>
</row>
<row>
<name>Desired User Slack</name>
<value>0</value>
</row>
<row>
<name>Fit Attempts</name>
<value>1</value>
</row>
</advanced_data___general>
<advanced_data___placement_preparation>
<row>
<name>Auto Fit Point 1 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Mid Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Mid Slack - Fit Attempt 1</name>
<value>-5119</value>
</row>
<row>
<name>Internal Atom Count - Fit Attempt 1</name>
<value>69</value>
</row>
<row>
<name>LE/ALM Count - Fit Attempt 1</name>
<value>44</value>
</row>
<row>
<name>LAB Count - Fit Attempt 1</name>
<value>5</value>
</row>
<row>
<name>Outputs per Lab - Fit Attempt 1</name>
<value>5.400</value>
</row>
<row>
<name>Inputs per LAB - Fit Attempt 1</name>
<value>10.400</value>
</row>
<row>
<name>Global Inputs per LAB - Fit Attempt 1</name>
<value>0.800</value>
</row>
<row>
<name>LAB Constraint 'non-global clock + sync load' - Fit Attempt 1</name>
<value>0:4;1:1</value>
</row>
<row>
<name>LAB Constraint 'non-global controls' - Fit Attempt 1</name>
<value>0:2;1:3</value>
</row>
<row>
<name>LAB Constraint 'non-global + aclr' - Fit Attempt 1</name>
<value>0:2;1:3</value>
</row>
<row>
<name>LAB Constraint 'global non-clock non-aclr' - Fit Attempt 1</name>
<value>0:5</value>
</row>
<row>
<name>LAB Constraint 'global controls' - Fit Attempt 1</name>
<value>0:1;1:4</value>
</row>
<row>
<name>LAB Constraint 'deterministic LABSMUXA/LABXMUXB' - Fit Attempt 1</name>
<value>0:3;1:2</value>
</row>
<row>
<name>LAB Constraint 'deterministic LABSMUXC/LABXMUXD' - Fit Attempt 1</name>
<value>0:2;1:3</value>
</row>
<row>
<name>LAB Constraint 'clock / ce pair constraint' - Fit Attempt 1</name>
<value>0:1;1:4</value>
</row>
<row>
<name>LAB Constraint 'aclr constraint' - Fit Attempt 1</name>
<value>0:1;1:4</value>
</row>
<row>
<name>LAB Constraint 'true sload_sclear pair' - Fit Attempt 1</name>
<value>0:3;1:2</value>
</row>
<row>
<name>LAB Constraint 'constant sload_sclear pair' - Fit Attempt 1</name>
<value>0:5</value>
</row>
<row>
<name>LAB Constraint 'has placement constraint' - Fit Attempt 1</name>
<value>0:5</value>
</row>
<row>
<name>LEs in Chains - Fit Attempt 1</name>
<value>24</value>
</row>
<row>
<name>LEs in Long Chains - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>LABs with Chains - Fit Attempt 1</name>
<value>2</value>
</row>
<row>
<name>LABs with Multiple Chains - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Time - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Time in tsm_tan.dll - Fit Attempt 1</name>
<value>0.010</value>
</row>
</advanced_data___placement_preparation>
<advanced_data___placement>
<row>
<name>Auto Fit Point 2 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Early Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Early Slack - Fit Attempt 1</name>
<value>-5277</value>
</row>
<row>
<name>Auto Fit Point 4 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Auto Fit Point 5 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Auto Fit Point 4 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Mid Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Mid Slack - Fit Attempt 1</name>
<value>-3741</value>
</row>
<row>
<name>Auto Fit Point 5 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Late Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Late Slack - Fit Attempt 1</name>
<value>-3741</value>
</row>
<row>
<name>Peak Regional Wire - Fit Attempt 1</name>
<value>0.000</value>
</row>
<row>
<name>Auto Fit Point 6 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Time - Fit Attempt 1</name>
<value>0</value>
</row>
</advanced_data___placement>
<advanced_data___routing>
<row>
<name>Early Slack - Fit Attempt 1</name>
<value>-2510</value>
</row>
<row>
<name>Early Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Peak Regional Wire - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Mid Slack - Fit Attempt 1</name>
<value>-2510</value>
</row>
<row>
<name>Late Slack - Fit Attempt 1</name>
<value>-2510</value>
</row>
<row>
<name>Late Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Time - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Time in tsm_tan.dll - Fit Attempt 1</name>
<value>0.040</value>
</row>
</advanced_data___routing>
<files>
<top>E:/mywork/new_pwm/new_pwm.vhd</top>
<extensions>
<ext ext_name="vhd">1</ext>
</extensions>
<sub_files>
<sub_file>E:/mywork/new_pwm/new_pwm.vhd</sub_file>
</sub_files>
</files>
<architecture>
<family>Cyclone II</family>
<auto_device>ON</auto_device>
<device>EP2C5T144C6</device>
</architecture>
<pkg_io>
<pin_std count="19">3.3-V LVTTL</pin_std>
</pkg_io>
</talkback>
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