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c8051 core 不是源代码版的

Most verilog users are familiar with the process required to integrate 
third-party PLI applications with Cadence's Verilog-XL verilog 
simulator.  That process involves building a new Verilog-XL kernel that 
recognizes the third-party's application PLI function calls.  With 
Mentor Graphics' ModelSim/Verilog simulator the process is extremely 
simple and does not require the building of a new simulation kernel.

In fact, the only step required is to update the modelSim.ini file.  
Inside modelsim.ini is a veriuser option.  You must un-comment this 
option and point to the ModelSim PLI model manager included with the 
TopProtect installation.  The correct syntax is shown below:

; List of dynamically loaded objects for Verilog PLI applications
Veriuser = $TOPPROTECT_DIR/mtiPliMM.so


Integrating TopProtect with Verilog-XL


In order for a Verilog simulator to simulate TopProtect models an 
integration step must be executed so the Verilog simulator will recognize 
our application functions.   This integration step only has to be executed
once and is done when building the Verilog executable that will be used by
all.

This application note shows how to integrate TopProtect into the Verilog-XL
simulator from Cadence Design Systems.  It is intended for those who have 
integrated other PLI applications into the Verilog-XL simulator and are 
familiar with the steps required.  For a complete understanding of the 
process please refer to Cadence's PLI 1.0 User Guide and Reference, 
Chapter 2.

Step 1 - Editing Veriuser.c

To associate TopProtect application functions with Verilog-XL you edit the
definition of the veriusertfs array in the file veriuser.c.  A vanilla 
veriuser.c file can be found at:  $CDS_INST_DIR/tools/verilog/src.  
A file called veriuser_td.c  with the correct veriusertfs entries to 
support TopProtect can be found at in this directory.  You would merge 
this entry with your existing veriuser.c file.

Below is the correct veriusertfs syntax to support TopProtect.


extern int createTopdownModel();
extern int topProtectMiscTF(int data, int reason);
 
s_tfcell veriusertfs[] =
{
    /*** Template for an entry:
    { usertask|userfunction, data,
      checktf(), sizetf(), calltf(), misctf(),
      "$tfname", forwref?, Vtool?, ErrMsg? },
    Example:
    { usertask, 0, my_check, 0, my_func, my_misctf, "$my_task" },
    ***/
 
    /*** add user entries here ***/
 
    { usertask, 0, 0, 0, createTopdownModel, topProtectMiscTF , 
"$createTDInstance", 1},
 
    {0} /*** final entry must be 0 ***/
};


Step 2 - Running vconfig

Vconfig is used to link TopProtect models with Verilog-XL.  Vconfig asks 
a series of questions and when complete generates a file called cr_vlog 
(or a file you specify when asked in vconfig).   The file cr_vlog is 
executed and creates the verilog executable that you execute when 
invoking the simulator.

The most important items to know are that currently TopProtect only 
supports static linking.  When vconfig asks how to link PLI applications 
please select item 4 as shown below: 

Pls choose how to link in PLI applications.
 	 Valid choices: 1) Dynamic with no user PLI Application,
                        2) Static with no user PLI Application ,
                        3) Dynamic with user PLI Application,
                        4)  Static with user PLI Application
<Enter 1-4> [1] :  4


By telling vconfig that you want to link in a user PLI application you 
will be asked to point to the veriuser.c you modified to work with 
TopProtect.  Point to that modified veriuser.c file.

The user template file 'veriuser.c' must always be
included in the link statement.  What is the path
name of this file ?
[/usr/local/LDV_2.1/tools/verilog/src/veriuser.c] : ./veriuser.c


When asked to point to PLI application files you must enter 
$TOPPROTECT_DIR/pliMM.so.  This is the TopProtect model manager for the 
Verilog-XL simulator.  This allows the platform and simulator independent 
binary model generated by TopProtect to run with Verilog-XL.

Give the names of PLI application files, library files, or 
relocatable object files that you want to link with Verilog-XL:
List the files one at a time, terminating with a single `.'
---------------------> $TOPPROTECT_DIR/pliMM.so
---------------------> .

Step 3 - Execute cr_vlog

Run the script cr_vlog, the default name given by vconfig.  If you chose
a different name execute that script.  This will build a new Verilog-XL 
executable, named verilog by default.

Before running verilog make sure your shared library paths are set up 
correctly:

  setenv SHLIB_PATH $TOPPROTECT_DIR                         HP
  setenv LD_LIBRARY_PATH $TOPPROTECT_DIR:/usr/dt/lib        Solaris



Integrating TopProtect with NC-Verilog


In order for a Verilog simulator to simulate TopProtect models an 
integration step must be executed so the Verilog simulator will recognize 
our application functions.   This integration step only has to be executed
once and is done when building the Verilog executable that will be used by
all.

This application note shows how to integrate TopProtect into the 
NC-Verilog simulator from Cadence Design Systems.  It is intended for 
those who have integrated other PLI applications into the NC-Verilog 
simulator and are familiar with the steps required.  For a complete 
understanding of the process please refer to Cadence's PLI 1.0 User 
Guide and Reference, Chapter 2.

Step 1 - Editing Veriuser.c

To associate TopProtect application functions with NC-Verilog you edit 
the definition of the veriusertfs array in the file veriuser.c.  A vanilla
veriuser.c file can be found at:  $CDS_INST_DIR/tools/verilog/src.  A file
called veriuser_td.c  with the correct veriusertfs entries to support 
TopProtect can be in this directory. You would merge this entry with 
your existing veriuser.c file.

Below is the correct veriusertfs syntax to support TopProtect.


extern int createTopdownModel();
extern int topProtectMiscTF(int data, int reason);
 
s_tfcell veriusertfs[] =
{
    /*** Template for an entry:
    { usertask|userfunction, data,
      checktf(), sizetf(), calltf(), misctf(),
      "$tfname", forwref?, Vtool?, ErrMsg? },
    Example:
    { usertask, 0, my_check, 0, my_func, my_misctf, "$my_task" },
    ***/
 
    /*** add user entries here ***/
 
    { usertask, 0, 0, 0, createTopdownModel, topProtectMiscTF , 
"$createTDInstance", 1},
 
    {0} /*** final entry must be 0 ***/
};


Step 2 - Edit makefile

Three steps are required to simulate verilog models with NC-Verilog, 
compilation, elaboration and simulation.  Each step has it's own 
executable, ncvlog, ncelab and ncsim.  To link TopProtect models two of 
the three executables, ncelab and ncsim, must be re-generated to include 
our PLI routines.  This is done by running the make utility.  The make
utility will read in a makefile that you have configured to include 
TopProtect PLI routines.

Let's configure a makefile to use to generate an ncelab and ncsim that 
will support TopProtect PLI calls.  First copy a default make file from:

  cp $CDS_INST_DIR/tools/inca/files/Makefile.nc Makefile.tds


You are going to edit the file Makefile.tds.  Here are the three changes 
you need to make:

Disable dynamic linking by commenting out ARCH_RELOCATE_OPT.  
TopProtect currently only supports static linking.

#ARCH_RELOCATE_OPT = -KPIC              Solaris
#ARCH_RELOCATE_OPT = +Z                 HP-UX

Point to the veriuser.c file you created in Step 1.

VERIUSER_C=$(TARGETDIR)/veriuser.c

Point to the TopProtect model manager for NC-Verilog.

PLI_OBJECTS=$(TOPPROTECT_DIR)/pliMM.so

Step 3 - Run make

Make sure you LD_LIBRARY_PATH environment variable is set correctly.

setenv LD_LIBRARY_PATH /usr/dt/lib

Run make.

make static -f Makefile.tds

This will create a new ncelab and ncsim executable that you will use 
when running TopProtect models.

-rwxrwxrwx   1 sai       5017724 Apr 28 14:36 ncsim*
-rwxrwxrwx   1 sai       4833112 Apr 28 14:36 ncelab*
-rw-rw-rw-   1 sai          5096 Apr 28 14:36 vpi_user.o
-rw-rw-rw-   1 sai         62780 Apr 28 14:36 veriuser.o
-rwxrwxrwx   1 sai          2559 Apr 28 14:35 veriuser.c*
-rw-rw-rw-   1 sai          8494 Apr 28 12:06 Makefile.tds