dds_sin.fit.eqn

用vhdl编写的程序

QB1_q_b[2]_PORT_A_data_in = BUS(DIN[2], DIN[4], DIN[8], DIN[9]);
QB1_q_b[2]_PORT_A_data_in_reg = DFFE(QB1_q_b[2]_PORT_A_data_in, QB1_q_b[2]_clock_0, , , );
QB1_q_b[2]_PORT_A_address = BUS(QWR[0], QWR[1], QWR[2], QWR[3], QWR[4], QWR[5], QWR[6], QWR[7], QWR[8], QWR[9]);
QB1_q_b[2]_PORT_A_address_reg = DFFE(QB1_q_b[2]_PORT_A_address, QB1_q_b[2]_clock_0, , , );
QB1_q_b[2]_PORT_B_address = BUS(QRD[0], QRD[1], QRD[2], QRD[3], QRD[4], QRD[5], QRD[6], QRD[7], QRD[8], QRD[9]);
QB1_q_b[2]_PORT_B_address_reg = DFFE(QB1_q_b[2]_PORT_B_address, QB1_q_b[2]_clock_1, , , );
QB1_q_b[2]_PORT_A_write_enable = VCC;
QB1_q_b[2]_PORT_A_write_enable_reg = DFFE(QB1_q_b[2]_PORT_A_write_enable, QB1_q_b[2]_clock_0, , , );
QB1_q_b[2]_PORT_B_read_enable = VCC;
QB1_q_b[2]_PORT_B_read_enable_reg = DFFE(QB1_q_b[2]_PORT_B_read_enable, QB1_q_b[2]_clock_1, , , );
QB1_q_b[2]_clock_0 = GLOBAL(sysclk);
QB1_q_b[2]_clock_1 = GLOBAL(sysclk);
QB1_q_b[2]_PORT_B_data_out = MEMORY(QB1_q_b[2]_PORT_A_data_in_reg, , QB1_q_b[2]_PORT_A_address_reg, QB1_q_b[2]_PORT_B_address_reg, QB1_q_b[2]_PORT_A_write_enable_reg, QB1_q_b[2]_PORT_B_read_enable_reg, , , QB1_q_b[2]_clock_0, QB1_q_b[2]_clock_1, , , , );
QB1_q_b[2]_PORT_B_data_out_reg = DFFE(QB1_q_b[2]_PORT_B_data_out, QB1_q_b[2]_clock_1, , , );
QB1_q_b[4] = QB1_q_b[2]_PORT_B_data_out_reg[1];


--count[0] is count[0] at LC_X25_Y13_N0
--operation mode is arithmetic

count[0]_lut_out = !count[0];
count[0] = DFFEAS(count[0]_lut_out, GLOBAL(amp), VCC, , , , , , );

--A1L17 is count[0]~57 at LC_X25_Y13_N0
--operation mode is arithmetic

A1L17_cout_0 = count[0];
A1L17 = CARRY(A1L17_cout_0);

--A1L18 is count[0]~57COUT1_95 at LC_X25_Y13_N0
--operation mode is arithmetic

A1L18_cout_1 = count[0];
A1L18 = CARRY(A1L18_cout_1);


--count[1] is count[1] at LC_X25_Y13_N1
--operation mode is arithmetic

count[1]_lut_out = count[1] $ (A1L17);
count[1] = DFFEAS(count[1]_lut_out, GLOBAL(amp), VCC, , , , , , );

--A1L20 is count[1]~61 at LC_X25_Y13_N1
--operation mode is arithmetic

A1L20_cout_0 = !A1L17 # !count[1];
A1L20 = CARRY(A1L20_cout_0);

--A1L21 is count[1]~61COUT1_97 at LC_X25_Y13_N1
--operation mode is arithmetic

A1L21_cout_1 = !A1L18 # !count[1];
A1L21 = CARRY(A1L21_cout_1);


--count[2] is count[2] at LC_X25_Y13_N2
--operation mode is arithmetic

count[2]_lut_out = count[2] $ (A1L20);
count[2] = DFFEAS(count[2]_lut_out, GLOBAL(amp), VCC, , , , , , );

--A1L23 is count[2]~65 at LC_X25_Y13_N2
--operation mode is arithmetic

A1L23_cout_0 = count[2] # !A1L20;
A1L23 = CARRY(A1L23_cout_0);

--A1L24 is count[2]~65COUT1_99 at LC_X25_Y13_N2
--operation mode is arithmetic

A1L24_cout_1 = count[2] # !A1L21;
A1L24 = CARRY(A1L24_cout_1);


--count[3] is count[3] at LC_X25_Y13_N3
--operation mode is arithmetic

count[3]_lut_out = count[3] $ A1L23;
count[3] = DFFEAS(count[3]_lut_out, GLOBAL(amp), VCC, , , , , , );

--A1L26 is count[3]~69 at LC_X25_Y13_N3
--operation mode is arithmetic

A1L26_cout_0 = !A1L23 # !count[3];
A1L26 = CARRY(A1L26_cout_0);

--A1L27 is count[3]~69COUT1_100 at LC_X25_Y13_N3
--operation mode is arithmetic

A1L27_cout_1 = !A1L24 # !count[3];
A1L27 = CARRY(A1L27_cout_1);


--count[4] is count[4] at LC_X25_Y13_N4
--operation mode is arithmetic

count[4]_lut_out = count[4] $ !A1L26;
count[4] = DFFEAS(count[4]_lut_out, GLOBAL(amp), VCC, , , , , , );

--A1L29 is count[4]~73 at LC_X25_Y13_N4
--operation mode is arithmetic

A1L29 = A1L30;


--count[5] is count[5] at LC_X25_Y13_N5
--operation mode is arithmetic

count[5]_carry_eqn = (!A1L29 & GND) # (A1L29 & VCC);
count[5]_lut_out = count[5] $ count[5]_carry_eqn;
count[5] = DFFEAS(count[5]_lut_out, GLOBAL(amp), VCC, , , , , , );

--A1L33 is count[5]~77 at LC_X25_Y13_N5
--operation mode is arithmetic

A1L33_cout_0 = !A1L29 # !count[5];
A1L33 = CARRY(A1L33_cout_0);

--A1L34 is count[5]~77COUT1_102 at LC_X25_Y13_N5
--operation mode is arithmetic

A1L34_cout_1 = !A1L29 # !count[5];
A1L34 = CARRY(A1L34_cout_1);


--count[6] is count[6] at LC_X25_Y13_N6
--operation mode is arithmetic

count[6]_carry_eqn = (!A1L29 & A1L33) # (A1L29 & A1L34);
count[6]_lut_out = count[6] $ (!count[6]_carry_eqn);
count[6] = DFFEAS(count[6]_lut_out, GLOBAL(amp), VCC, , , , , , );

--A1L36 is count[6]~81 at LC_X25_Y13_N6
--operation mode is arithmetic

A1L36_cout_0 = count[6] & (!A1L33);
A1L36 = CARRY(A1L36_cout_0);

--A1L37 is count[6]~81COUT1_104 at LC_X25_Y13_N6
--operation mode is arithmetic

A1L37_cout_1 = count[6] & (!A1L34);
A1L37 = CARRY(A1L37_cout_1);


--count[7] is count[7] at LC_X25_Y13_N7
--operation mode is normal

count[7]_carry_eqn = (!A1L29 & A1L36) # (A1L29 & A1L37);
count[7]_lut_out = count[7] $ (count[7]_carry_eqn);
count[7] = DFFEAS(count[7]_lut_out, GLOBAL(amp), VCC, , , , , , );


--A1L67 is ddsout_rom[3]~762 at LC_X16_Y6_N8
--operation mode is normal

A1L67 = cmp_sel & sselect[1] & sselect[0];


--NB5_add_sub_cella[4] is mul_6:mul|ll:u2|lpm_divide:lpm_divide_component|lpm_divide_k5j:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_qe8:add_sub_14|add_sub_cella[4] at LC_X17_Y6_N0
--operation mode is arithmetic

NB5_add_sub_cella[4] = T1_dataout_n[5];

--NB5L5 is mul_6:mul|ll:u2|lpm_divide:lpm_divide_component|lpm_divide_k5j:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_qe8:add_sub_14|add_sub_cella[4]~COUT at LC_X17_Y6_N0
--operation mode is arithmetic

NB5L5_cout_0 = T1_dataout_n[5];
NB5L5 = CARRY(NB5L5_cout_0);

--NB5L6 is mul_6:mul|ll:u2|lpm_divide:lpm_divide_component|lpm_divide_k5j:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_qe8:add_sub_14|add_sub_cella[4]~COUTCOUT1_112 at LC_X17_Y6_N0
--operation mode is arithmetic

NB5L6_cout_1 = T1_dataout_n[5];
NB5L6 = CARRY(NB5L6_cout_1);


--T1_dataout_n[6] is mul_6:mul|kk:u1|altmult_add:ALTMULT_ADD_component|mult_add_rh23:auto_generated|alt_mac_out:mac_out4|dataout_n[6] at LC_X19_Y4_N8
--operation mode is arithmetic

T1_dataout_n[6]_carry_eqn = (!T1L8 & T1L16) # (T1L8 & T1L17);
T1_dataout_n[6]_lut_out = X2_result[6] $ X1_result[6] $ !T1_dataout_n[6]_carry_eqn;
T1_dataout_n[6] = DFFEAS(T1_dataout_n[6]_lut_out, GLOBAL(sysclk), VCC, , , , , , );

--T1L19 is mul_6:mul|kk:u1|altmult_add:ALTMULT_ADD_component|mult_add_rh23:auto_generated|alt_mac_out:mac_out4|dataout_n[6]~123 at LC_X19_Y4_N8
--operation mode is arithmetic

T1L19_cout_0 = X2_result[6] & (X1_result[6] # !T1L16) # !X2_result[6] & X1_result[6] & !T1L16;
T1L19 = CARRY(T1L19_cout_0);

--T1L20 is mul_6:mul|kk:u1|altmult_add:ALTMULT_ADD_component|mult_add_rh23:auto_generated|alt_mac_out:mac_out4|dataout_n[6]~123COUT1_223 at LC_X19_Y4_N8
--operation mode is arithmetic

T1L20_cout_1 = X2_result[6] & (X1_result[6] # !T1L17) # !X2_result[6] & X1_result[6] & !T1L17;
T1L20 = CARRY(T1L20_cout_1);


--NB3_add_sub_cella[4] is mul_6:mul|ll:u2|lpm_divide:lpm_divide_component|lpm_divide_k5j:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_qe8:add_sub_12|add_sub_cella[4] at LC_X19_Y6_N3
--operation mode is arithmetic

NB3_add_sub_cella[4] = T1_dataout_n[7];

--NB3L5 is mul_6:mul|ll:u2|lpm_divide:lpm_divide_component|lpm_divide_k5j:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_qe8:add_sub_12|add_sub_cella[4]~COUT at LC_X19_Y6_N3
--operation mode is arithmetic

NB3L5_cout_0 = T1_dataout_n[7];
NB3L5 = CARRY(NB3L5_cout_0);

--NB3L6 is mul_6:mul|ll:u2|lpm_divide:lpm_divide_component|lpm_divide_k5j:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_qe8:add_sub_12|add_sub_cella[4]~COUTCOUT1_93 at LC_X19_Y6_N3
--operation mode is arithmetic

NB3L6_cout_1 = T1_dataout_n[7];
NB3L6 = CARRY(NB3L6_cout_1);


--T1_dataout_n[8] is mul_6:mul|kk:u1|altmult_add:ALTMULT_ADD_component|mult_add_rh23:auto_generated|alt_mac_out:mac_out4|dataout_n[8] at LC_X19_Y3_N0
--operation mode is arithmetic

T1_dataout_n[8]_carry_eqn = T1L22;
T1_dataout_n[8]_lut_out = X2_result[8] $ X1_result[8] $ !T1_dataout_n[8]_carry_eqn;
T1_dataout_n[8] = DFFEAS(T1_dataout_n[8]_lut_out, GLOBAL(sysclk), VCC, , , , , , );

--T1L24 is mul_6:mul|kk:u1|altmult_add:ALTMULT_ADD_component|mult_add_rh23:auto_generated|alt_mac_out:mac_out4|dataout_n[8]~127 at LC_X19_Y3_N0
--operation mode is arithmetic

T1L24_cout_0 = X2_result[8] & (X1_result[8] # !T1L22) # !X2_result[8] & X1_result[8] & !T1L22;
T1L24 = CARRY(T1L24_cout_0);

--T1L25 is mul_6:mul|kk:u1|altmult_add:ALTMULT_ADD_component|mult_add_rh23:auto_generated|alt_mac_out:mac_out4|dataout_n[8]~127COUT1_225 at LC_X19_Y3_N0
--operation mode is arithmetic

T1L25_cout_1 = X2_result[8] & (X1_result[8] # !T1L22) # !X2_result[8] & X1_result[8] & !T1L22;
T1L25 = CARRY(T1L25_cout_1);


--NB2_add_sub_cella[4] is mul_6:mul|ll:u2|lpm_divide:lpm_divide_component|lpm_divide_k5j:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_qe8:add_sub_11|add_sub_cella[4] at LC_X19_Y5_N1
--operation mode is arithmetic

NB2_add_sub_cella[4] = T1_dataout_n[8];

--NB2L5 is mul_6:mul|ll:u2|lpm_divide:lpm_divide_component|lpm_divide_k5j:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_qe8:add_sub_11|add_sub_cella[4]~COUT at LC_X19_Y5_N1
--operation mode is arithmetic

NB2L5_cout_0 = T1_dataout_n[8];
NB2L5 = CARRY(NB2L5_cout_0);

--NB2L6 is mul_6:mul|ll:u2|lpm_divide:lpm_divide_component|lpm_divide_k5j:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_qe8:add_sub_11|add_sub_cella[4]~COUTCOUT1_93 at LC_X19_Y5_N1
--operation mode is arithmetic

NB2L6_cout_1 = T1_dataout_n[8];
NB2L6 = CARRY(NB2L6_cout_1);