📄 zong.rpt

📁 数字秒表的整个设计以及程序．波形仿真都在里面的了
💻 RPT
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字号:
1    -> - - - - - - - - - - - - - - - - | - - - - - - | <-- clr
LC84 -> - - - - - - * * - - - - - - - - | - - - - * * | <-- |jishu:1|CNT6:5|:6
LC81 -> - - - - - - * * - - - - - - - - | - - - - * * | <-- |jishu:1|CNT6:6|:6
LC62 -> - - - * - * - - - - - - - - - - | - - - * * - | <-- |jishu:1|CNT10:1|:4
LC59 -> - - - - - - * * - - - - - - - - | - - - * * - | <-- |jishu:1|CNT10:1|:8
LC94 -> - - - * * * - - - - - - - - - - | - - - - * * | <-- |jishu:1|CNT10:2|:4
LC93 -> - - - - - - * * - - - - - - - - | - - - - * * | <-- |jishu:1|CNT10:2|:8
LC90 -> - - - * * - - - - - - - - - - - | - - - - * * | <-- |jishu:1|CNT10:3|:4
LC89 -> - - - - - - * * - - - - - - - - | - - - - * * | <-- |jishu:1|CNT10:3|:8
LC55 -> - - - * * * - - - - - - - - - - | - - - * * * | <-- |jishu:1|CNT10:4|:4
LC56 -> - - - - - - * * - - - - - - - - | - - - * * * | <-- |jishu:1|CNT10:4|:8
LC83 -> - - - - - - - - * * * * * * * * | - - - - * * | <-- |MULX:3|~471~1
LC63 -> - - - - - - - - * * * * * * * * | - - - * * - | <-- |MULX:3|~513~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                           e:\18052034\d1\zong.rpt
zong

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'F':

                                         Logic cells placed in LAB 'F'
        +------------------------------- LC95 |jishu:1|CNT6:5|:4
        | +----------------------------- LC84 |jishu:1|CNT6:5|:6
        | | +--------------------------- LC85 |jishu:1|CNT6:5|:8
        | | | +------------------------- LC87 |jishu:1|CNT6:6|:4
        | | | | +----------------------- LC81 |jishu:1|CNT6:6|:6
        | | | | | +--------------------- LC96 |jishu:1|CNT6:6|:8
        | | | | | | +------------------- LC94 |jishu:1|CNT10:2|:4
        | | | | | | | +----------------- LC88 |jishu:1|CNT10:2|:6
        | | | | | | | | +--------------- LC93 |jishu:1|CNT10:2|:8
        | | | | | | | | | +------------- LC92 |jishu:1|CNT10:2|:10
        | | | | | | | | | | +----------- LC90 |jishu:1|CNT10:3|:4
        | | | | | | | | | | | +--------- LC91 |jishu:1|CNT10:3|:6
        | | | | | | | | | | | | +------- LC89 |jishu:1|CNT10:3|:8
        | | | | | | | | | | | | | +----- LC82 |jishu:1|CNT10:3|:10
        | | | | | | | | | | | | | | +--- LC86 |MULX:3|~471~1~2
        | | | | | | | | | | | | | | | +- LC83 |MULX:3|~471~1
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'F'
LC      | | | | | | | | | | | | | | | | | A B C D E F |     Logic cells that feed LAB 'F':
LC95 -> * * * - - - - - - - * * * * * * | - - - - - * | <-- |jishu:1|CNT6:5|:4
LC84 -> * * * - - - - - - - * * * * - - | - - - - * * | <-- |jishu:1|CNT6:5|:6
LC85 -> * * * - - - - - - - * * * * - - | - - - * - * | <-- |jishu:1|CNT6:5|:8
LC87 -> - - - * * * - - - - - - - - * * | - - - - - * | <-- |jishu:1|CNT6:6|:4
LC81 -> - - - * * * - - - - - - - - - - | - - - - * * | <-- |jishu:1|CNT6:6|:6
LC96 -> - - - * * * - - - - - - - - - - | - - - * - * | <-- |jishu:1|CNT6:6|:8
LC94 -> * * * - - - * * * * - - - - - - | - - - - * * | <-- |jishu:1|CNT10:2|:4
LC88 -> * * * - - - * * - * - - - - * * | - - - - - * | <-- |jishu:1|CNT10:2|:6
LC93 -> * * * - - - * * * * - - - - - - | - - - - * * | <-- |jishu:1|CNT10:2|:8
LC92 -> * * * - - - * * * * - - - - - - | - - - * - * | <-- |jishu:1|CNT10:2|:10
LC90 -> - - - * * * - - - - * * * * - - | - - - - * * | <-- |jishu:1|CNT10:3|:4
LC91 -> - - - * * * - - - - * * - * * * | - - - - - * | <-- |jishu:1|CNT10:3|:6
LC89 -> - - - * * * - - - - * * * * - - | - - - - * * | <-- |jishu:1|CNT10:3|:8
LC82 -> - - - * * * - - - - * * * * - - | - - - * - * | <-- |jishu:1|CNT10:3|:10
LC86 -> - - - - - - - - - - - - - - - * | - - - - - * | <-- |MULX:3|~471~1~2
LC83 -> - - - - - - - - - - - - - - * * | - - - - * * | <-- |MULX:3|~471~1

Pin
67   -> - - - - - - - - - - - - - - - - | - - - - - - | <-- clk
1    -> - - - - - - - - - - - - - - - - | - - - - - - | <-- clr
LC49 -> * * * * * * * * * * * * * * - - | - - * * - * | <-- |CNT10:4|:4
LC50 -> * * * * * * * * * * * * * * - - | - - * * - * | <-- |CNT10:4|:6
LC51 -> * * * * * * * * * * * * * * - - | - - * * - * | <-- |CNT10:4|:8
LC52 -> * * * * * * * * * * * * * * - - | - - * * - * | <-- |CNT10:4|:10
LC61 -> - - - - - - - - - - - - - - * * | - - - * - * | <-- |jishu:1|CNT10:1|:6
LC55 -> - - - - - - * * * * - - - - - - | - - - * * * | <-- |jishu:1|CNT10:4|:4
LC58 -> - - - - - - * * * * - - - - * * | - - - * - * | <-- |jishu:1|CNT10:4|:6
LC56 -> - - - - - - * * * * - - - - - - | - - - * * * | <-- |jishu:1|CNT10:4|:8
LC57 -> - - - - - - * * * * - - - - - - | - - - * - * | <-- |jishu:1|CNT10:4|:10
LC74 -> - - - - - - - - - - - - - - * * | - * * * * * | <-- |MULX:3|:24
LC71 -> - - - - - - - - - - - - - - * * | - * * * * * | <-- |MULX:3|:26
LC66 -> - - - - - - - - - - - - - - * * | - * * * * * | <-- |MULX:3|:28


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                           e:\18052034\d1\zong.rpt
zong

** EQUATIONS **

clk      : INPUT;
clr      : INPUT;
s_p      : INPUT;

-- Node name is 'clk10ms' 
-- Equation name is 'clk10ms', location is LC064, type is output.
 clk10ms = LCELL( _EQ001 $  GND);
  _EQ001 =  _LC049 & !_LC050 & !_LC051 &  _LC052;

-- Node name is 'q0' 
-- Equation name is 'q0', location is LC069, type is output.
 q0      = LCELL( _EQ002 $  GND);
  _EQ002 = !_LC070 & !_LC078 &  _LC083 &  _X001 &  _X002
         # !_LC070 &  _LC078 & !_LC083 &  _X001 &  _X002
         #  _LC070 & !_LC078 & !_LC083 &  _X001 &  _X002;
  _X001  = EXP(!_LC063 & !_LC070 & !_LC078 & !_LC083);
  _X002  = EXP( _LC063 & !_LC070 & !_LC078 & !_LC083);

-- Node name is 'q1' 
-- Equation name is 'q1', location is LC075, type is output.
 q1      = LCELL( _EQ003 $  _EQ004);
  _EQ003 =  _LC070 & !_LC078 & !_LC083 &  _X001 &  _X002
         # !_LC063 & !_LC070 &  _LC083 &  _X001 &  _X002
         # !_LC070 & !_LC078 &  _LC083 &  _X001 &  _X002;
  _X001  = EXP(!_LC063 & !_LC070 & !_LC078 & !_LC083);
  _X002  = EXP( _LC063 & !_LC070 & !_LC078 & !_LC083);
  _EQ004 = !_LC063 & !_LC070 & !_LC078 & !_LC083;

-- Node name is 'q2' 
-- Equation name is 'q2', location is LC077, type is output.
 q2      = LCELL( _EQ005 $  _EQ006);
  _EQ005 =  _LC063 & !_LC070 & !_LC078 &  _LC083 &  _X001 &  _X002
         # !_LC063 &  _LC070 & !_LC078 & !_LC083 &  _X001 &  _X002
         # !_LC063 & !_LC070 &  _LC078 &  _X001 &  _X002;
  _X001  = EXP(!_LC063 & !_LC070 & !_LC078 & !_LC083);
  _X002  = EXP( _LC063 & !_LC070 & !_LC078 & !_LC083);
  _EQ006 = !_LC063 & !_LC070 & !_LC078 & !_LC083;

-- Node name is 'q3' 
-- Equation name is 'q3', location is LC080, type is output.
 q3      = LCELL( _EQ007 $  _EQ008);
  _EQ007 =  _LC063 & !_LC070 & !_LC078 &  _LC083 &  _X001 &  _X002
         # !_LC063 & !_LC070 &  _LC078 &  _X001 &  _X002
         # !_LC070 &  _LC078 & !_LC083 &  _X001 &  _X002
         #  _LC070 & !_LC078 & !_LC083 &  _X001 &  _X002;
  _X001  = EXP(!_LC063 & !_LC070 & !_LC078 & !_LC083);
  _X002  = EXP( _LC063 & !_LC070 & !_LC078 & !_LC083);
  _EQ008 = !_LC063 & !_LC070 & !_LC078 & !_LC083;

-- Node name is 'q4' 
-- Equation name is 'q4', location is LC065, type is output.
 q4      = LCELL( _EQ009 $  VCC);
  _EQ009 = !_LC063 &  _LC078 & !_LC083 &  _X001 &  _X002
         # !_LC070 & !_LC078 & !_LC083 &  _X001 &  _X002
         #  _LC070 &  _LC083 &  _X001 &  _X002
         #  _LC070 &  _LC078 &  _X001 &  _X002;
  _X001  = EXP(!_LC063 & !_LC070 & !_LC078 & !_LC083);
  _X002  = EXP( _LC063 & !_LC070 & !_LC078 & !_LC083);

-- Node name is 'q5' 
-- Equation name is 'q5', location is LC067, type is output.
 q5      = LCELL( _EQ010 $  VCC);
  _EQ010 =  _LC063 & !_LC078 &  _LC083 &  _X001 &  _X002
         # !_LC070 & !_LC078 & !_LC083 &  _X001 &  _X002
         #  _LC070 &  _LC083 &  _X001 &  _X002
         #  _LC070 &  _LC078 &  _X001 &  _X002;
  _X001  = EXP(!_LC063 & !_LC070 & !_LC078 & !_LC083);
  _X002  = EXP( _LC063 & !_LC070 & !_LC078 & !_LC083);

-- Node name is 'q6' 
-- Equation name is 'q6', location is LC072, type is output.
 q6      = LCELL( _EQ011 $  GND);
  _EQ011 = !_LC063 & !_LC070 & !_LC078 & !_LC083
         #  _LC079 &  _X001 &  _X002;
  _X001  = EXP(!_LC063 & !_LC070 & !_LC078 & !_LC083);
  _X002  = EXP( _LC063 & !_LC070 & !_LC078 & !_LC083);

-- Node name is 'seg0' 
-- Equation name is 'seg0', location is LC017, type is output.
 seg0    = LCELL( _EQ012 $  _LC025);
  _EQ012 =  _LC025 & !_LC066 & !_LC071 & !_LC074;

-- Node name is 'seg1' 
-- Equation name is 'seg1', location is LC021, type is output.
 seg1    = LCELL( _EQ013 $  _LC028);
  _EQ013 = !_LC019 & !_LC066 & !_LC071 & !_LC074;

-- Node name is 'seg2' 
-- Equation name is 'seg2', location is LC033, type is output.
 seg2    = LCELL( _EQ014 $  _LC048);
  _EQ014 = !_LC044 & !_LC066 & !_LC071 & !_LC074;

-- Node name is 'seg3' 
-- Equation name is 'seg3', location is LC035, type is output.
 seg3    = LCELL( _EQ015 $  _LC043);
  _EQ015 = !_LC045 & !_LC066 & !_LC071 & !_LC074;

-- Node name is 'seg4' 
-- Equation name is 'seg4', location is LC040, type is output.
 seg4    = LCELL( _EQ016 $  _LC038);
  _EQ016 = !_LC042 & !_LC066 & !_LC071 & !_LC074;

-- Node name is 'seg5' 
-- Equation name is 'seg5', location is LC041, type is output.
 seg5    = LCELL( _EQ017 $  _LC034);
  _EQ017 = !_LC047 & !_LC066 & !_LC071 & !_LC074;

-- Node name is '|CNT10:4|LPM_ADD_SUB:77|addcore:adder|addcore:adder0|result_node2' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC054', type is buried 
_LC054   = LCELL( _LC050 $  _EQ018);
  _EQ018 =  _LC051 &  _LC052;

-- Node name is '|CNT10:4|:4' 
-- Equation name is '_LC049', type is buried 
_LC049   = DFFE( _EQ019 $  GND, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ019 =  _LC049 & !_LC050 & !_LC051 & !_LC052 &  _X003
         # !_LC049 &  _LC050 &  _LC051 &  _LC052;
  _X003  = EXP( _LC050 &  _LC051 &  _LC052);

-- Node name is '|CNT10:4|:6' 
-- Equation name is '_LC050', type is buried 
_LC050   = DFFE( _EQ020 $  GND, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ020 =  _LC049 & !_LC050 & !_LC051 & !_LC052 &  _LC054
         # !_LC049 &  _LC054;

-- Node name is '|CNT10:4|:8' 
-- Equation name is '_LC051', type is buried 
_LC051   = DFFE( _EQ021 $  GND, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ021 = !_LC049 &  _LC051 & !_LC052
         # !_LC049 & !_LC051 &  _LC052;

-- Node name is '|CNT10:4|:10' 
-- Equation name is '_LC052', type is buried 
_LC052   = DFFE( _EQ022 $  GND, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ022 =  _LC049 & !_LC050 & !_LC051 & !_LC052
         # !_LC049 & !_LC052;

-- Node name is '|jishu:1|CNT6:5|:4' 
-- Equation name is '_LC095', type is buried 
_LC095   = TFFE( _EQ023,  _EQ024, GLOBAL( clr),  VCC,  VCC);
  _EQ023 =  _LC084 &  _LC085 & !_LC088 &  _LC092 & !_LC093 &  _LC094 & 
             !_LC095
         #  _LC084 & !_LC085 & !_LC088 &  _LC092 & !_LC093 &  _LC094 & 
              _LC095
         #  _LC085 & !_LC088 &  _LC092 & !_LC093 &  _LC094 &  _LC095;
  _EQ024 =  _LC049 & !_LC050 & !_LC051 &  _LC052;

-- Node name is '|jishu:1|CNT6:5|:6' 
-- Equation name is '_LC084', type is buried 
_LC084   = TFFE( _EQ025,  _EQ026, GLOBAL( clr),  VCC,  VCC);
  _EQ025 = !_LC084 &  _LC085 & !_LC088 &  _LC092 & !_LC093 &  _LC094 & 
             !_LC095
         #  _LC084 &  _LC085 & !_LC088 &  _LC092 & !_LC093 &  _LC094
         #  _LC084 & !_LC088 &  _LC092 & !_LC093 &  _LC094 &  _LC095;
  _EQ026 =  _LC049 & !_LC050 & !_LC051 &  _LC052;

-- Node name is '|jishu:1|CNT6:5|:8' 
-- Equation name is '_LC085', type is buried 
_LC085   = TFFE( _EQ027,  _EQ028, GLOBAL( clr),  VCC,  VCC);
  _EQ027 = !_LC084 & !_LC085 & !_LC088 &  _LC092 & !_LC093 &  _LC094 & 
              _LC095
         # !_LC085 & !_LC088 &  _LC092 & !_LC093 &  _LC094 & !_LC095
         #  _LC085 & !_LC088 &  _LC092 & !_LC093 &  _LC094;
  _EQ028 =  _LC049 & !_LC050 & !_LC051 &  _LC052;

-- Node name is '|jishu:1|CNT6:6|:4' 
-- Equation name is '_LC087', type is buried 
_LC087   = TFFE( _EQ029,  _EQ030, GLOBAL( clr),  VCC,  VCC);
  _EQ029 =  _LC081 &  _LC082 & !_LC087 & !_LC089 &  _LC090 & !_LC091 & 
              _LC096
         #  _LC081 &  _LC082 &  _LC087 & !_LC089 &  _LC090 & !_LC091 & 
             !_LC096
         #  _LC082 &  _LC087 & !_LC089 &  _LC090 & !_LC091 &  _LC096;
  _EQ030 =  _LC049 & !_LC050 & !_LC051 &  _LC052;

-- Node name is '|jishu:1|CNT6:6|:6' 
-- Equation name is '_LC081', type is buried 
_LC081   = TFFE( _EQ031,  _EQ032, GLOBAL( clr),  VCC,  VCC);
  _EQ031 = !_LC081 &  _LC082 & !_LC087 & !_LC089 &  _LC090 & !_LC091 & 
              _LC096
         #  _LC081 &  _LC082 & !_LC089 &  _LC090 & !_LC091 &  _LC096
         #  _LC081 &  _LC082 &  _LC087 & !_LC089 &  _LC090 & !_LC091;
  _EQ032 =  _LC049 & !_LC050 & !_LC051 &  _LC052;
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