tsb.vhd

自适应滤波器adaptive的vhdl实现的源代码。

library IEEE;
use IEEE.STD_LOGIC_1164.all;

entity tsb is
port ( clk : in std_logic;
data_in : in std_logic_vector(3 downto 0);
data_out : out std_logic_vector(3 downto 0);
first_oct : out std_logic );
end ;
-- tsb component
architecture Behavioral of tsb is
signal fo1, fo2 : std_logic;
signal data0 : std_logic_vector(3 downto 0);
signal data1 : std_logic_vector(3 downto 0);
signal data2 : std_logic_vector(3 downto 0);
signal data3 : std_logic_vector(3 downto 0);
begin
process(clk)
begin
if clk'event and clk = '1' then
data0 <= data_in;
data1 <= data0;
data2 <= data1;
data3 <= data2;
data_out <= data3;
-- Assert control bit for first octect
-- delay for 2 clk's
fo1 <= data3(3);
fo2 <= fo1;
first_oct <= fo2;
end if;
end process;
end Behavioral;