ddr_ctrl.cr.mti

xilinx ddr3最新VHDL代码,通过调试

E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2_old.vhd {0 {vcom -work ddr_ctrl -2002 -explicit E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2_old.vhd
Model Technology ModelSim SE vcom 5.8d Compiler 2004.06 Jun 12 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
** Error: (vcom-19) Failed to access library 'proc_common_v2_00_a' at "proc_common_v2_00_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2_old.vhd(130): Library proc_common_v2_00_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2_old.vhd(131): Unknown identifier 'proc_common_v2_00_a'.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2_old.vhd(132): Unknown identifier 'proc_common_v2_00_a'.
** Error: (vcom-19) Failed to access library 'unisim' at "unisim".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2_old.vhd(134): Library unisim not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2_old.vhd(135): Unknown identifier 'unisim'.
** Error: (vcom-19) Failed to access library 'xilinxcorelib' at "xilinxcorelib".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2_old.vhd(138): Library xilinxcorelib not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2_old.vhd(174): VHDL Compiler exiting

} {7.0 8.0 9.0 13.0 14.0 17.0 18.0 20.0} {}} E:/work/altera/cntl_ddr3/cntl_ddr3/ipic_if.vhd {0 {vcom -work ddr_ctrl -2002 -explicit E:/work/altera/cntl_ddr3/cntl_ddr3/ipic_if.vhd
Model Technology ModelSim SE vcom 5.8d Compiler 2004.06 Jun 12 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
-- Loading package attributes
-- Loading package std_logic_misc
** Error: (vcom-19) Failed to access library 'proc_common_v2_00_a' at "proc_common_v2_00_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ipic_if.vhd(130): Library proc_common_v2_00_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ipic_if.vhd(131): Unknown identifier 'proc_common_v2_00_a'.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ipic_if.vhd(132): Unknown identifier 'proc_common_v2_00_a'.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ipic_if.vhd(195): VHDL Compiler exiting

} {9.0 10.0 11.0 15.0} {}} E:/work/altera/cntl_ddr3/cntl_ddr3/counters.vhd {0 {vcom -work ddr_ctrl -2002 -explicit E:/work/altera/cntl_ddr3/cntl_ddr3/counters.vhd
Model Technology ModelSim SE vcom 5.8d Compiler 2004.06 Jun 12 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
** Error: (vcom-19) Failed to access library 'proc_common_v2_00_a' at "proc_common_v2_00_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/counters.vhd(100): Library proc_common_v2_00_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/counters.vhd(101): Unknown identifier 'proc_common_v2_00_a'.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/counters.vhd(102): Unknown identifier 'proc_common_v2_00_a'.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/counters.vhd(167): VHDL Compiler exiting

} {7.0 8.0 9.0 13.0} {}} E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2a.vhd {0 {vcom -work ddr_ctrl -2002 -explicit E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2a.vhd
Model Technology ModelSim SE vcom 5.8d Compiler 2004.06 Jun 12 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
** Error: (vcom-19) Failed to access library 'proc_common_v2_00_a' at "proc_common_v2_00_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2a.vhd(135): Library proc_common_v2_00_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2a.vhd(136): Unknown identifier 'proc_common_v2_00_a'.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2a.vhd(137): Unknown identifier 'proc_common_v2_00_a'.
** Error: (vcom-19) Failed to access library 'unisim' at "unisim".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2a.vhd(139): Library unisim not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2a.vhd(140): Unknown identifier 'unisim'.
** Error: (vcom-19) Failed to access library 'xilinxcorelib' at "xilinxcorelib".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2a.vhd(143): Library xilinxcorelib not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/read_data_path2a.vhd(179): VHDL Compiler exiting

} {7.0 8.0 9.0 13.0 14.0 17.0 18.0 20.0} {}} E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd {0 {vcom -work ddr_ctrl -2002 -explicit E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd
Model Technology ModelSim SE vcom 5.8d Compiler 2004.06 Jun 12 2004
-- Loading package standard
-- Loading package std_logic_1164
** Error: (vcom-19) Failed to access library 'unisim' at "unisim".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(7): Library unisim not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(8): Unknown identifier 'unisim'.
** Error: (vcom-19) Failed to access library 'proc_common_v2_00_a' at "proc_common_v2_00_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(10): Library proc_common_v2_00_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(11): Unknown identifier 'proc_common_v2_00_a'.
** Error: (vcom-19) Failed to access library 'interrupt_control_v1_00_a' at "interrupt_control_v1_00_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(13): Library interrupt_control_v1_00_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(14): Unknown identifier 'interrupt_control_v1_00_a'.
** Error: (vcom-19) Failed to access library 'wrpfifo_v1_01_b' at "wrpfifo_v1_01_b".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(16): Library wrpfifo_v1_01_b not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(17): Unknown identifier 'wrpfifo_v1_01_b'.
** Error: (vcom-19) Failed to access library 'rdpfifo_v1_01_b' at "rdpfifo_v1_01_b".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(19): Library rdpfifo_v1_01_b not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(20): Unknown identifier 'rdpfifo_v1_01_b'.
** Error: (vcom-19) Failed to access library 'opb_ipif_v3_01_b' at "opb_ipif_v3_01_b".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(22): Library opb_ipif_v3_01_b not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(23): Unknown identifier 'opb_ipif_v3_01_b'.
** Error: (vcom-19) Failed to access library 'ddr_v1_10_a' at "ddr_v1_10_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(25): Library ddr_v1_10_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(26): Unknown identifier 'ddr_v1_10_a'.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl2_wrapper.vhd(31): VHDL Compiler exiting

} {5.0 6.0 7.0 10.0 11.0 14.0 15.0 18.0 19.0 22.0 23.0 26.0 27.0 30.0 31.0 34.0} {}} E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd {0 {vcom -work ddr_ctrl -2002 -explicit E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd
Model Technology ModelSim SE vcom 5.8d Compiler 2004.06 Jun 12 2004
-- Loading package standard
-- Loading package std_logic_1164
** Error: (vcom-19) Failed to access library 'unisim' at "unisim".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(7): Library unisim not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(8): Unknown identifier 'unisim'.
** Error: (vcom-19) Failed to access library 'proc_common_v2_00_a' at "proc_common_v2_00_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(10): Library proc_common_v2_00_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(11): Unknown identifier 'proc_common_v2_00_a'.
** Error: (vcom-19) Failed to access library 'interrupt_control_v1_00_a' at "interrupt_control_v1_00_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(13): Library interrupt_control_v1_00_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(14): Unknown identifier 'interrupt_control_v1_00_a'.
** Error: (vcom-19) Failed to access library 'wrpfifo_v1_01_b' at "wrpfifo_v1_01_b".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(16): Library wrpfifo_v1_01_b not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(17): Unknown identifier 'wrpfifo_v1_01_b'.
** Error: (vcom-19) Failed to access library 'rdpfifo_v1_01_b' at "rdpfifo_v1_01_b".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(19): Library rdpfifo_v1_01_b not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(20): Unknown identifier 'rdpfifo_v1_01_b'.
** Error: (vcom-19) Failed to access library 'opb_ipif_v3_01_b' at "opb_ipif_v3_01_b".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(22): Library opb_ipif_v3_01_b not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(23): Unknown identifier 'opb_ipif_v3_01_b'.
** Error: (vcom-19) Failed to access library 'ddr_v1_10_a' at "ddr_v1_10_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(25): Library ddr_v1_10_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(26): Unknown identifier 'ddr_v1_10_a'.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_cntl3_wrapper.vhd(31): VHDL Compiler exiting

} {5.0 6.0 7.0 10.0 11.0 14.0 15.0 18.0 19.0 22.0 23.0 26.0 27.0 30.0 31.0 34.0} {}} E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_controller2.vhd {0 {vcom -work ddr_ctrl -2002 -explicit E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_controller2.vhd
Model Technology ModelSim SE vcom 5.8d Compiler 2004.06 Jun 12 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
** Error: (vcom-19) Failed to access library 'proc_common_v2_00_a' at "proc_common_v2_00_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_controller2.vhd(184): Library proc_common_v2_00_a not found.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_controller2.vhd(185): Unknown identifier 'proc_common_v2_00_a'.
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_controller2.vhd(186): Unknown identifier 'proc_common_v2_00_a'.
** Error: (vcom-19) Failed to access library 'ddr_v1_10_a' at "ddr_v1_10_a".
No such file or directory. (errno = ENOENT)
** Error: E:/work/altera/cntl_ddr3/cntl_ddr3/ddr_controller2.vhd(188): Library ddr_v1_10_a not found.