📄 prep2.vt

📁 多个Verilog和vhdl程序例子
💻 VT
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`timescale 100 ps/100 ps
module top ;
reg CLK, RST, SEL, LDCOMP, LDPRE ;
reg [0:7] DATA1, DATA2 ;
wire [0:7] DATA0 ;

prep2 c1 (.CLK(CLK), .RST(RST), .SEL(SEL),.LDCOMP( LDCOMP), .LDPRE(LDPRE), .DATA1(DATA1), .DATA2(DATA2), .DATA0(DATA0)) ;

initial
begin
	#0 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b01XXXXXXXXXXXXXXXXX0X
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b11XXXXXXXXXXXXXXXXX0X
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000001101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000001101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000010101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000010101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000011101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000011101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000100101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000100101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000101101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000101101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000110101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000110101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000111101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000111101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000000000000111
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b01XXXXXXXXXXXXXXXXX0X
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b11XXXXXXXXXXXXXXXXX0X
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000001101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000001101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000010101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000010101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000011101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000011101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000100101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000100101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000101101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000101101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000110101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000110101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000111101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000111101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b000000000100000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
,DATA2[0],LDPRE,SEL,LDCOMP } = 22'b100000000100000000101
 ;

	#100 { CLK,RST,DATA1[7],DATA1[6],DATA1[5],DATA1[4],DATA1[3],DATA1[2],DATA1[1]
,DATA1[0],DATA2[7],DATA2[6],DATA2[5],DATA2[4],DATA2[3],DATA2[2],DATA2[1]
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💿 文件大小 107 K
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📂 所属分类 VHDL/FPGA/Verilog
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#Verilog #vhdl #程序
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